Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > Interface
?
?
Interface??

40nm PHY chip handles up to 100m at 2.5W/port

Posted: 25 May 2010 ?? ?Print Version ?Bookmark and Share

Keywords:PHY chip? 10GBASE-T? power consumption?

Solarflare Communications has begun sampling what it claims is the first 40nm quad-port 10GBASE-T PHY chip.

The SFT9104 is Solarflare's fourth-generation PHY and has passed testing on links up to 100m, meeting a critical requirement in the 10GBASE-T standard for broad deployment.

According to Solarflare, the SFT9104 achieves 100-meter reach at one-third the power consumption of competitive products. Under normal 100m operation, the SFT9104 consumes just 2.5W per port. The chip has multiple data center power modes, including a 1.5W low power and latency mode for in-the-rack applications.

The SFT9104 is fully backwards compatible with both 1000BASE-T and 100BASE-TX, enabling seamless integration while preserving investments in existing infrastructures.

The SFT9104 is now sampling to key customers. Production schedule is slated in Q4.

- Ismini Scouras
eeProductCenter





Article Comments - 40nm PHY chip handles up to 100m at ...
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top