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H.264 encoding ref design supports Altera, Xilinx FPGAs

Posted: 02 Jun 2010 ?? ?Print Version ?Bookmark and Share

Keywords:H.264? video encoding? FPGA? interface?

J2K-REF reference design

H.264 video encoding evaluation has got simpler via a solution that can run on either Altera or Xilinx FPGAs on commercial prototyping boards.

The H264-REF H.264 video encoding reference design system from semiconductor intellectual property (IP) provider CAST Inc. combines multiple hardware functions and software in a pre-integrated package.

The system is based on the H264-E encoder core developed by Alma Technologies S.A. which produces compressed video at up to 1080p resolution and 30fps and uses efficient baseline profile architecture.

The H264-REF system also includes a PCIe endpoint controller core, an H.264 multimedia interface core, and an appropriate DDR memory controller core.

Custom H264-REF software provides a GUI that makes it easy to control H.264 encoding parameters such as the target quality level or a constant bit rate requirement. The GUI also helps a designer manage workflow details like input and output clip specifications. The system includes additional drivers and other software to make it ready to run as delivered.

The Altera Stratix IV GX FPGA development kit includes a fast grade Stratix IV silicon device, and the V5 TAI Logic Module Virtual FPGA Prototyping System from S2C Inc. includes a fast Virtex-5 device.

The H264-REF system was recently licensed by CARERI, the Chinese Aeronautical Radio Electronics Research Institute, for use in the CAST IP Joint Lab established at CARERI's facility in Shanghai, China.

A J2K-REF reference design system will soon join the H264-REF, using the same platform to bring similar evaluation and analysis benefits to the complex JPEG 2000 image compression standard.

- Colin Holland
Programmable Logic DesignLine





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