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LatticeECP3 and LatticeECP2M high-speed backplane measurements

Posted: 22 Jun 2010 ?? ?Print Version ?Bookmark and Share

Keywords:backplane measurements? serdes backplane transmission? LatticeECP2M measurements?

The LatticeECP3 and LatticeECP2M families are low-cost FPGA product lines offering high-end features such as high-speed, embedded serdes interfaces. These devices feature up to 16 serdes channels with data rates of up to 3.125Gbit/s.

This technical note outlines two experiments that measure the serdes backplane transmission performance thresholds of the LatticeECP3 and LatticeECP2M devices.

View the PDF document for more information.

Click here to view related datasheets.

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