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USB hub cuts chip-to-chip link power consumption

Posted: 01 Jul 2010 ?? ?Print Version ?Bookmark and Share

Keywords:USB? flash reader? power consumption? interface?

SMSC has launched its first product that uses a board-level variant of the USB 2.0 interconnect. The USB4640 is a combination two-port USB 2.0 hub and flash media reader controller that links to a host processor via a patented low-power version of USB 2.0 called High Speed Inter-Chip (HSIC).

HSIC is a little used chip-to-chip implementation of USB 2.0 developed by SMSC and standardized by the USB Implementers Forum. It uses a novel 1.2V pad rather than a full PHY block to dramatically reduce the size and power consumption of a chip-to-chip USB link.

The HSIC approach can cut the power required to establish a chip-to-chip USB link by a factor of 14 for chips made in an 180nm process, said Robert Hollingsworth, general manager of the communications and computing products group at SMSC.

Despite the power and cost savingsand the fact the USB-IF standardized HSIC way back in September 2007the interconnect has not been widely used to date. That may be due to concerns about SMSC's ownership of the technology, said Hollingsworth, noting SMSC was issued a patent on HSIC in April.

So the chip design company is forming a licensing program for the technology which SMSC calls Inter-Chip Connectivity. Promoters and some adopter-class members of USB-IF can use the technology in host chips royalty free. For end-device chips, SMSC will charge the USB-IF members a $100,000 licensing fee but no per-unit royalties. Vendors who do not belong to USB-IF can negotiate licenses individually.

So far, only Marvell has publicly described its use of HSIC which appears in one of the company's ARM-based SoCs. Five other ARM-based SoC suppliers are also using or planning to use the link, however they have not been public about their plans yet.

"The advent of SoC-based systems has attracted attention for HSIC, especially during period of smartbooks where it is all about low power," said Hollingsworth. "As a result we found SoC companies starting to deploy this," he said.

There is an alternative on the horizon. Intel and Qualcomm engineers are heading up a new work group in the USB-IF that aims to create a more generic version of HSIC suitable for any USB link. The called Serial Link PHY interface is still being defined, and it will require more power and die size than the USB 2.0-specific HSIC, said Hollingsworth.

To date, Intel has not publicly supported HSIC.

Meanwhile, SMSC engineers are evaluating an HSIC test tool from MCCI Corp. The HSIC technology is also available from Synopsys.

- Rick Merritt
EE Times

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