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Expanded FPGA supports 24 6.375Gbit/s transceivers

Posted: 16 Jul 2010 ?? ?Print Version ?Bookmark and Share

Keywords:FPGA? transceiver?

 Arria II GX

Many applications commonly implemented in FPGAs are moving to faster transceiver speeds, driven by the need to support mainstream protocol standards such as PCI Express (PCIe) Gen2, SATA III, CPRI-6G, Interlaken and RXAUI. In addition, system power consumption is becoming an increasingly challenging design constraint.

To meet these requirements, Altera Corp. has enhanced its Arria II GX FPGA variant with 6.375Gbit/s transceivers and up to 1.25Gbit/s LVDS support. It has also added an Arria II GZ FPGA variant that offers up to 24 6.375Gbit/s transceivers, more density and memory, and higher digital signal processing (DSP) capabilities than Arria II GX FPGAs. The increased processing capacity includes a PCIe Gen2 hard IP block, 30 percent more multipliers and 25 percent more user logic than the original Arria II GX family.

Arria II GX FPGAs feature up to 16 6.375-Gbit/s transceivers and faster I/Os than the previous generation of Arria II FPGAs, making them suitable for applications in markets such as wireless, wireline, test, medical and storage.

The Arria II GX and GZ families feature up to 350K logic elements (LEs) and up to 16.4Mb of embedded memory.

Arria II GX FPGAs are shipping now and are supported in the Quartus II design software version 10.0. Arria II GZ devices will be supported in the Quartus II design software version 10.1 when the device ships in the fourth quarter of this year.

- Colin Holland
EE Times

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