IP core tips parameterizable FIR filter

These FPGAs integrate radiation-tolerant math blocks with the spaceflight-proven industry-standard RTAX-S FPGA architecture. CoreFIR v4.0 uses these on-chip resources to implement a highly parameterizable, single-rate, fully-enumerated FIR filter, delivering one of the essential building blocks in DSP systems.

As opposed to high throughput DSP technologies used on SRAM FPGAs, Actel's antifuse-based RTAX-DSP devices are radiation tolerant and do not require complex multichip implementations to mitigate radiation effects in space. This reduces power consumption, thermal loading and design complexity, while increasing overall system reliability. By taking advantage of CoreFIR v4.0 and RTAX-DSP radiation-tolerant FPGAs, designers can now rapidly design and implement DSP functions while taking advantage of the extensive spaceflight heritage of Actel's RTAX-S architecture.

CoreFIR v4.0 is now available for ordering.