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Film deposition technology for sub-32nm

Posted: 19 Aug 2010 ?? ?Print Version ?Bookmark and Share

Keywords:VECTOR? conformal film deposition? thermal oxide film? transistor? wafer?

Novellus Systems has announced its development of conformal film deposition (CFD) technology for depositing 100 percent step coverage dielectric films on structures with aspect ratios of up to 4:1. This innovative technology answers sub-32nm requirements for front-end-of-line (FEOL) applications like gate liners and spacers, shallow trench isolation high-k metal gate (HKMG) liners, and spacers used for double patterning applications. Composition of Novellus' CFD oxide films may be likened in quality to thermal oxide films, which feature low leakage, high break-down voltage, and low wet etch rate.

The variability in sub-32nm transistor dimensions is a key area of industry focus because of the impact on device performance. Innovative, highly conformal spacer films have been created to control these critical dimensions across the wafer. As integrated metrology and advanced process control techniques minimize wafer-to-wafer and lot-to-lot variability in spacer dimensions, within-wafer variability is controlled by the technology used to deposit the spacer film. Furthermore, dielectric layers utilized for these spacer films demand deposition at temperatures which are low enough to minimize dopant diffusion.

Novellus has developed CFD technology that deposits highly conformal films for FEOL applications that meet the quality and low temperature requirements of sub-32nm devices. The FTIR spectrum shows the strong similarity between a CFD oxide film deposited at 400 degrees C and a furnace-grown thermal oxide. Meanwhile current-voltage plot shows high breakdown performance behavior of the CFD film. In addition, analysis has shown that the film quality on the sidewall matches that in the field. In comparison to competitive spacer films deposited using an atomic layer deposition process, the combination of Novellus' CFD technology and VECTOR's multi-station sequential deposition (MSSD) architecture delivers superior within-wafer and wafer-to-wafer repeatability, with significantly higher throughput and lower chemical consumption.

Due to the delay in Extreme UV (EUV) lithography, the semiconductor industry is turning to spacer-based double patterning schemes for sub-3Xnm memory and sub-2Xnm logic devices. The most cost-effective double patterning schemes utilize a photoresist core followed by a spacer film with 100 percent step coverage. The spacer films have to be deposited using temperatures and chemistries that are compatible with photoresist materials. Such spacer films used in a double patterning scheme need to demonstrate excellent conformality with no loading effects that cause line "bending" and yet deliver outstanding within-wafer patterning uniformity.

Novellus' CFD films can be deposited at substrate temperatures less than 50?C, and are therefore compatible with advanced photoresists used in double patterning schemes. There is 100 percent step coverage of a CFD film over a photoresist structure with no loading effect on the underlying resist. The thickness range of the CFD film is less than 0.2 percent, which translates to less than one angstrom [0.1nm] on a typical 30nm-thick film, a requirement for advanced patterning at 32nm and beyond.





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