Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > EDA/IP

DesignWare MIPI M-PHY IP now in 40-nm process tech

Posted: 27 Aug 2010 ?? ?Print Version ?Bookmark and Share

Keywords:DesignWare? DigRF(SM)? M-PHY? LTE? WiMAX?

Synopsys Inc. has just announced availability of the DesignWare MIPI M-PHY IP for next-generation high-speed interfaces based on the newly ratified MIPI Alliance M-PHY specification.

With this new addition to the DesignWare MIPI IP portfolio, Synopsys becomes the pioneering provider offering a comprehensive solution of a controller and PHY IP for both the MIPI DigRF(SM) v3(2.5G/3.0G) and v4(4G) standards. Combining both standards in a mobile device gives the benefit of the faster 4G standards while preserving broad coverage by using 2.5G/3.0G as a fallback mode. The configurable MIPI DigRF V4 Master Controller and M-PHY hard macro are compliant with the MIPI Alliance specifications. Using a single-vendor solution permits designers to reduce both the risk and cost of integrating these MIPI interfaces into baseband and application processor integrated circuits, while accelerating time-to-market of advanced semiconductor solutions for LTE and Mobile WiMAX.

The DesignWare MIPI M-PHY implements all required physical layer functionality outlined in the MIPI DigRF v4 specification. In turn, the DesignWare MIPI M-PHY is designed to meet precise power consumption guidelines of the MIPI M-PHY specification, keeping the energy expenditure below 15pJ/bit for typical LTE applications. Meanwhile, the integrated analog Phase Lock Loop (PLL) and biasing block were made to help guarantee the integrity of the high-speed clocks and signals required to meet the strict timing requirements of the protocol, affording designers a robust and low risk solution. Furthermore, the DesignWare MIPI M-PHY supports the optional dithering functionality defined in the MIPI DigRF v4 specification to further lower Electromagnetic Interference (EMI).

Marketing vice president for Synopsis' Solutions Group, John Koeter says, "To address the growing usage of multimedia content in mobile devices, designers are using standards-based interfaces from the MIPI Alliance to help them meet the increased data throughput requirements for mobile terminals targeting 4G standard air interfaces." He explains that Synopsys plays a key role in supporting the MIPI ecosystem by providing designers with high-quality DesignWare MIPI IP consisting of DigRF v3/v4, CSI-2, D-PHY, and M-PHY IP, enabling them to lower the risk of integrating MIPI interfaces into their designs.

DesignWare MIPI M-PHY is now offered in leading 40nm process technologies. The DesignWare MIPI IP for DigRF v3/v4, CSI-2 and D-PHY are also available now. More information may be accessed through the MIPI page at the Synopsys website.

Article Comments - DesignWare MIPI M-PHY IP now in 40-n...
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top