AppliedMicro chooses Tensilica for high-throughput project

AppliedMicro's senior manager of engineering, Sean Campeau states, "We selected Tensilica's DPUs because of their remarkable ability to be customized with high-bandwidth, efficient interfaces, such as FIFO-like queues, to quickly stream data into and out of the processor." He explains, "These high-speed connections bypass the main system bus altogether, allowing us to implement functions in the processor that previously could only meet our performance targets by being implemented in RTL (register transfer level) logic. Implementing these functions in a processor speeds our design effort considerably and gives us a much more flexible solution."

Meanwhile, Tensilica's VP of marketing and business development, Steve Roddy says, "AppliedMicro's project is typical of high performance dataplane signal processing designs that can take advantage of our customizable dataplane processor (DPU) and specialized I/Os." He explains that in the dataplane, customers need demanding data throughput and computational performance that can't be achieved using traditional processors.