Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > T&M

FPGA design tool debugs TMR, ensures safety

Posted: 23 Sep 2010 ?? ?Print Version ?Bookmark and Share

Keywords:FPGA design? verification? debug?

GateRocket Inc. releases a collaborative solution with Mentor Graphics Corp. for FPGA design that uses a verification-through-synthesis flow. The solution is particularly useful for designers of FPGAs that target safety-critical applications in military and aerospace markets.

Combining GateRocket's tool set for FPGA debug and verification with Mentor's Precision Synthesis solution, the solution enables new levels of performance and efficiency throughout the FPGA design process for any type of application. It allows designers to more efficiently verify and debug important high-reliability features such as synthesis-based triple modular redundancy (TMR) and compliance with safety-critical standards such as DO-254.

The collaboration expands GateRocket's support for industry-leading FPGA synthesis tools, enabling a more efficient design flow for users of Mentor's Precision Synthesis products. The GateRocket solution includes the RocketDrive verification platform and RocketVision debug tool, significantly reduces excessive iterations through synthesis and place-and-route caused by unforeseen design errors introduced by IP blocks and downstream design flows. It also allows the verification of the FPGA to be done by using the targeted FPGA itself, in the RocketDrive system, which provides accuracy and enhances verification performance

The resulting methodology cuts the number of synthesis-to-place-and-route iterations typically required in the development of complex FPGAs, a growing bottleneck as FPGAs increase in size and complexity.

The solution is well-suited for product developers who must comply with DO-254, a standard mandated by the U.S. Federal Aviation Administration and other aviation authorities to ensure the safety of in-flight hardware. DO-254 mandates that verification should be performed at all key stages of design from conceptual analysis to in-system test. It is essential in a DO-254 program to ensure that the physical device behaves identically to the thoroughly verified model. The RocketDrive system enables thorough DO-254 compliant verification that is reusable for both verifying the model and testing the actual hardware. This allows a user to quickly prove that the FPGA behaves the same as the model, and ensure that a thoroughly verified FPGA is passed along to the in-target phase of test.

Article Comments - FPGA design tool debugs TMR, ensures...
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top