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Microcontroller delivers 'highest performance' for ARM Cortex-M3

Posted: 24 Sep 2010 ?? ?Print Version ?Bookmark and Share

Keywords:bus master? interface? SRAM?

NXP Semiconductors N.V. has launched the LPC1800 microcontroller for ARM Cortex-M3 systems, boasting low power operation at ultra-low frequencies all the way through to 150MHz maximum performance from either flash or RAM.

Geoff Lees, vice president and general manager of NXP Semiconductors' microcontroller product line, said the LPC1800 "sets a new performance benchmark for ARM Cortex-M3 microcontrollers." The microcontroller's flexible dual-bank 256-bit wide flash memories boast concurrent write/read operations for "golden copy" preservation and prevention of reprogramming mishaps. It can also be used as a single bank of memory.

NXP the LPC1800 microcontroller for ARM Cortex-M3 systems

A flexible quad-SPI interface and a state configurable timer subsystem are among the most innovative features of the LPC1800, which was designed using NXP's ultra low-leakage 90nm process technology.

NXP said the LPC1800 offers faster operation, low dynamic power consumption, and proprietary low leakage optimization of 10 to 100 times' reduction in standby modes. On-chip SRAM of up to 200KB in multiple banks each feature separate bus master access for higher throughput and individual power-down control for low power operation. The dual-bank 1MB Flash architecture provides the highest reliability in-application re-programming, and allows for non-stop Flash operation.

Available in 144-pin and 208-pin LQFP packages and 100-pin, 180-pin and 256-pin BGA packages, the microcontroller connects with "virtually all" SPI and quad-SPI manufacturers.

Peripherals for the LPC1800 include two HS USB controllers, an on-chip HS PHY, a 10/100T Ethernet controller with hardware enabled TCP/IP checksum calculation, a high-resolution color LCD controller, and AES decryption including two 128-bit secure OTP memories for key storage. AES encryption is also available on request.

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