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IP reduces embedded memory transient errors

Posted: 05 Nov 2010 ?? ?Print Version ?Bookmark and Share

Keywords:Self-Test and Repair Error Correcting Codes? system-on-chip?

Synopsys Inc., provider of software and IP for semiconductors, has just announced the availability of the DesignWare STAR ECC (Self-Test and Repair Error Correcting Codes) IP as a part of its DesignWare STAR Memory System product family.

Synopsys says this new IP offers a highly automated design implementation and test diagnostic flow which assists SoC designers to rapidly reduce the number of embedded memory transient errors, like soft errors which occur in emerging semiconductor process technologies. Targeted at applications such as automotive, aerospace and high-end computing, it enables designers to attain high performance and high field reliability at the same time improving time-to-market.

VP of marketing for the Solutions Group at Synopsys, John Koeter cites, "As SoCs manufactured in advanced technology nodes become more susceptible to environmental influences, there is an ongoing need to reduce soft error rates." He further explains, "The DesignWare STAR ECC IP enables designers to easily select the required fault tolerance level to protect against these transient errors. By using Synopsys' DesignWare STAR ECC IP, designers can achieve their high performance and yield requirements with less risk and improved time-to-market."

The DesignWare STAR ECC IP solution is currently available as part of the DesignWare STAR Memory System and works in tandem with Synopsys' DFTMAX compression to give a comprehensive test and yield solution for digital logic and embedded memories.

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