Microsemi SoCs converge on 65nm embedded flash process
Keywords:embedded flash platform? SoC? 65nm? manufacturing?
The new platform is expected to maintain the company's low power leadership, providing 65 percent lower dynamic power while enhancing the Flash*Freeze feature to provide lower static current. Future devices will include industry-standard bus interfaces and also allow integration of hard IP such as embedded microprocessor cores, DSP blocks, high speed transceivers, memory interfaces, nonvolatile flash memory and programmable analog.
Microsemi and UMC are first to market with the 65nm embedded flash process. First commercial silicon is already in house, with availability expected 1H 2011. Microsemi's SoC Products Division is concurrently launching its customer lead program for early adopters in the commercial and industrial markets who want early access to emerging technology for their next generation designs.
Microsemi also offered a sneak peek at the next generation radiation tolerant (RT) flash-based SoCs. The 4th generation RT FPGAs will feature up to 20 million gates, offering a larger array of flip-flops, memory and hardened embedded IP cores. The devices will include DSP blocks, PLLs and high speed interfaces, such as SpaceWire, DDR2/3, PCIe, to get data on and off chip quickly and efficiently. The new flash-based FPGA architecture provides mitigation to total dose radiation and single event effects. When compared to SRAM FPGAs, Microsemi's radiation-tolerant flash-based FPGAs have intrinsic configuration immunity to single event upsets, removing the need for board level mitigation schemes.
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