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FPGA design software updated

Posted: 10 Nov 2010 ?? ?Print Version ?Bookmark and Share

Keywords:FPGA software? synthesis tool? design?

The latest version of Lattice Semiconductor's Lattice Diamond FPGA design software adds important updates, including support for the new MachXO2 PLD family, complete support for the LatticeECP3 FPGA family, and the initial release of the Lattice Synthesis Engine (LSE) with support for the MachXO and MachXO2 product families.

Lattice Diamond 1.1 brings the software's design exploration capability and improved user productivity to users of the company's new MachXO2 PLD family, allowing them to use a wide array of synthesis tools for low-power and cost-sensitive applications, according to Lattice's software product planning manager, Mike Kendrick.

After years of development, LSE, which initially targeted internal Lattice FPGA architecture, gives MachXO2 and MachXO PLD users an additional choice of synthesis tool for design exploration. LSE supports both Verilog and VHDL languages and uses SDC format for constraints.

The final production power, timing and SSO analysis values for the entire LatticeECP3 FPGA family, including the recently released ECP3-17EA device, are supported by the release. Lattice said ongoing improvements to the synthesis, MAP and PAR implementation engines have led to an average FMax improvement of 20% on larger designs, such as those targeted to the ECP3-150EA device. Enhancements to the targeting of behavioral HDL to the sysDSP block's cascading feature led to a 30% performance improvement for the Lattice FIR IP.

Lattice Diamond 1.1 also builds on the intuitive, modern GUI introduced in version 1.0, with several design flow enhancements that include speedier recalculation of static timing analysis in the Timing Analysis View.

All Lattice Diamond users can now simulate mixed language designs and access more simulator capacity to handle even larger designscapabilities that were previously available to licensed users.

In addition, Synopsys' Synplify Pro advanced FPGA synthesis is included for all operating systems supported, and Aldec's Active-HDL Lattice Edition II simulator is available for Windows.

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