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IEDM zooms in on energy saving

Posted: 26 Nov 2010 ?? ?Print Version ?Bookmark and Share

Keywords:semiconductors? energy? devices? power?

The 2010 International Electron Devices Meeting is focusing on semiconductors and other devices that generate, transmit, use and save energy.

One plenary talk will discuss how power semiconductors and circuitry can cut losses along the entire electrical energy chain, from generation to distribution to consumption. According to Arunjai Mittal, division president, industrial and multimarket, Infineon Technologies, the biggest potential for energy savings lies in the way we use our available energy, and he will describe a number of semiconductor technologies that can enable higher levels of energy-efficiency for lighting, electric motor drives, the power grid and other areas.

A symposium on power electronics technology will present 14 papers addressing crucial power and energy technologies, and another session will focus on emerging power devices and technology from Texas Instruments, UC-Santa Barbara, TranSiC, ABB, Toyota and International Rectifier Corp.

Eight papers will also be given describing power semiconductors made from both silicon and non-silicon semiconducting materials by Ohio State, Massachusetts Institute of Technology, IMEC, Hong Kong University of Science & Technology, Panasonic, North Carolina State University, University of Toronto, and Taiwan Semiconductor Manufacturing Co.

Plus, an evening panel session is entitled "Power Crunch -- Threat or Opportunity?"

The confluence of design and process technology and its ancillary power challenges will be addressed by

A special session on "Design challenges for non-conventional devices and 3D LSIs" will tackle the confluence of design and process technology and its ancillary power challenges. Two papers stand out in that session.

The first is an invited paper by researchers from Keio University that will detail a ThruChip Interface (TCI) which uses inductive coupling for 3D CMOS integration. It is implemented by digital circuits in a standard CMOS process and compares well with the more conventional thru-silicon via process in data rate (>10Gbps/ch), reliability (BER-14), and energy dissipation (The second paper, from Embedded Systems Laboratory, presents a novel thermal-aware design paradigm for 3D ICs, developed in cooperation with IBM, that includes thermal modeling as a fundamental step to design 3D multi-processor ICs with inter-tier liquid cooling microchannels. The modeling in combination with the use of dynamic thermal management at system-level to tune the flow rate of the coolant in each tier achieves thermally-balanced 3D ICs, according to the researchers.

A groundbreaking paper more in line with IEDM's 56 years of presenting the latest cr�me de la cr�me of electron devices is an InGaAs MOSFET developed by a team led by University of Tokyo and including NIAIST and Sumitomo Chemical Co. The development is both the world�s first InGaAs MOSFET built on an insulating substrate, and also the thinnest InGaAs MOSFET ever made, with a 3.5nm channel. Nonconducting substrates are key to the eventual integration of such devices with silicon CMOS architectures because they reduce short-channel effects, according to he researchers.

The team direct wafer-bonded the device to silicon and avoided creating unwanted source-drain junctions, which, because of the extremely thin films which make up the device, would have been difficult to anneal and would have made ion implantation difficult. Instead, they substituted an n-doped accumulation-mode channel.

- Nicolas Mokhoff
EE Times

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