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3DS-IC group to fast-track TSV standards

Posted: 15 Dec 2010 ?? ?Print Version ?Bookmark and Share

Keywords:TSV? 3DS-IC? standards? working group?

SEMI worked with SEMATECH to launch the Three-Dimensional Stacked Integrated Circuits (3DS-IC) group to develop manufacturing standards for through-silicon via (TSV) technology. While TSVs are one of the most rapidly developing technologies in the semiconductor industry, cost-effective high-volume manufacturing will be difficult to achieve unless manufacturing standards are developed.

Sematech represents Globalfoundries, HP, IBM Intel, Samsung and UMC, among others. The 3DS-IC Standards Committee also has the support of Amkor, ASE, IMEC, ITRI, Olympus, Qualcomm, Semilab, Tokyo Electron, and Xilinx.

3DS-IC adoption would result in increased performance, smaller footprints, and reduced cost and power consumption. However, multiple manufacturing challenges must first be solved because 3DS-ICs? increased design and mechanical complexity can lead to signal interference, increased manufacturing defects, and thermal management issues.

Currently, 3DS-ICs are already in production for CMOS image sensors. In 2013, high-volume manufacturing for Wide Input/Output Synchronous Dynamic Random Access Memory (IO SDRAM) is expected.

The 3DS-IC Standards Committee will initially consist of three sub-groups:

Bonded Wafer Pair (BWP) Task Force

This group will create a standard for BWP, using SEMI M1 (Specifications for Polished Single Crystal Silicon Wafers) as a starting point. The focus will be on TSV-focus, wafer-pair geometry, edges, and equipment issues with BWP. Andy Rudack (SEMATECH) is the Task Force leader.

Inspection and Metrology Task Force

With no existing standards in place, the group will seek to identify and create new standards that address deficiencies for metrology and inspection created by 3DS-IC. This includes issues like TSV depth, BWP thickness/TTV, Microbump co-planarity, Defect, and Overlay. Chris Moore (Semilab) is the Task Force leader.

Thin Wafer Carrier Task Force

Currently no standards exist so this group will identify and create new standards for thinned wafer carriers to address deficiencies created by 3DS-IC. Scope could include issues like thin wafer handling, thin wafer carriers (automation, shipping, process). Urmi Ray (Qualcomm) is the Task Force Leader.

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