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40nm STB SoC integrates multithreaded MIPS core

Posted: 17 Dec 2010 ?? ?Print Version ?Bookmark and Share

Keywords:SoC? STB? multithreaded MIPS core?

Broadcom Corp.�s BCM7422 combines a 1.3 GHz multi-threaded MIPS processor with an H.264 codec supporting MPEG Scalable Video Coding and Multiview Video Coding for high definition 3D TV. The company says that the solution, which is now being sampled, doubles the performance of current Broadcom products, partly due to the multithreaded core.

It supports OpenGL ES 2.0 graphics, the MoCA 1.1 coax networking standard and DLNA 1.5.

Broadcom claims the SoC's applications processor delivers 3,000 Dhrystone Mips along with an additional 3,000 Mips of performance in additional media cores. It demonstrated the chip at its annual analyst day event.

3D TV unit shipments will grow ten-fold between 2010 and 2014, according to Michelle Abraham, principal analyst at market watcher In-Stat. Worldwide residential media server unit shipments will exceed three million in 2011, and grow to over 13 million in 2014, she added.

"Consumer demand for connected apps and 3DTV is driving the market," said Dan Marotta, general manager of Broadcom�s broadband communications group, speaking in the press release.

?- Rick Merritt
EE Times





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