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Compiler enables higher productivity for development of DSP algorithms

Posted: 31 Jan 2011 ?? ?Print Version ?Bookmark and Share

Keywords:Synopsys? Synphony Model Compiler? MATLAB/Simulink? IP model library?

Provider of semiconductor technology, Microsemi Corp, has announced that Synopsys' Synphony Model Compiler, a design tool suite for hardware DSP algorithm design, now offers support for Microsemi FPGAs. Synphony Model Compiler brings easier and more reliable FPGA execution of algorithms by delivering a more automated implementation and verification flow for engineers using MATLAB/Simulink. The software tool also attains significantly higher productivity than alternative MATLAB/Simulink flows, providing the designer with a mechanism to rapidly evaluate high-level area and performance trade-offs.

Synphony Model Compiler also supports many of Microsemi's FPGAs, including the RTAX-DSP, RTAX-S/SL, Axcelerator, as well as the ProASIC3, IGLOO, and Fusion devices.

The software includes: a synthesizable IP model library for the MATLAB/Simulink environment for wireless, multimedia and signal processing applications; high-level synthesis to automatically produce a bit-exact, optimized HDL implementation; an automated flow to capture test vectors from the high-level model; automatic HDL test bench generation to verify bit accuracy; creation of C-models representing the final RTL for use in hardware and software verification flow (requires optional package); and integration with Synplify Pro logic synthesis for efficient FPGA implementation.

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COUNTRY: United States

APP: wireless network equipment;portable computers

PUD: 22225

KW: baseband processor, 40nm, GIGAFAB, 3.75G, 2G, HSUPA, EDGE, GPRS, GSM

LINK_KW: Spreadtrum Communications, TD-SCDMA, 40LP


ORG: Spreadtrum Communications, Inc;TSMC


TITLE: 3G TD-SCDMA baseband processor is first 40nm baseband chip

DES: Spreadtrum and TSMC collaborate to offer 3G TD-SCDMA baseband processor, a 40nm baseband chip that supports China's 3G standard. Chip also features up to a 2.8Mbps bandwidth and 40LP process tech.

Spreadtrum Communications and TSMC have unveiled their achievement on the first commercialized 40nm Time Division - Synchronous Code Division Multiple Access (TD-SCDMA) baseband processor. Initial silicon success for this baseband processor was attained by the two companies by jointly optimizing design, process and manufacturing. The chip is in early production at Fab 12, one of TSMC's GIGAFAB facilities in Taiwan.

Additionally, the processor supports TD-SCDMA and other telecommunication 3.75G to 2G specifications as well as High-Speed Uplink Packet Access (HSUPA), Enhanced Data GSM Environment (EDGE), General Packet Radio Service (GPRS) and Global System for Mobile Communications (GSM). It also features up to a 2.8Mbps bandwidth that is over a hundred times faster than the 2G standard. The baseband processor also uses TSMC's 40nm low power (40LP) process technology to extend battery lifetime in mobile telecommunication. Meanwhile, the 40LP process also supports other leakage-sensitive applications such as application processor, portable consumer and wireless connectivity devices.

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