Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > EDA/IP

Synopsis launches verification migration program

Posted: 09 Feb 2011 ?? ?Print Version ?Bookmark and Share

Keywords:verification? migration? VCS?

Synopsys Inc. has introduced the verification FastForward migration program that the company has been operating in pilot phase since 2009. The company has also invited Cadence Incisive and Mentor Questa users to join.

The verification FastForward migration program has seen many verification teams migrate to Synposys' VCS multicore-enabled functional verification solution and improve their verification effectiveness, Synopsys claimed.

The company claims the verification solution offers technologies including performance engines, SystemVerilog support for VMM, OVM and the UVM methodologies, a constraints solver, coverage closure technologies, low power verification capabilities, and a portfolio of verification IP.

By combining the verification FastForward program and VCS' technologies, Synopsys says users can achieve up to 2x faster verification closure.

Synopsys said the verification FastForward program includes technical services, training and expert verification support. As part of the program, users gain access to services such as assistance with OVM to UVM testbench migration, migration of scripts, verification IPs, and regression environment, as well as training for efficient deployment of VCS and UVM methodology.

Separately, Synopsys launched VCS support for the UVM 1.0 methodology. Combined with existing support for VMM and OVM 2.1.1, the company claimed that "this offers VCS users the industry's most broad and mature SystemVerilog support."

- Anne-Francoise Pele
??EE Times

Article Comments - Synopsis launches verification migra...
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top