Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > Memory/Storage
?
?
Memory/Storage??

I2C bus interface 3 reception in single-master mode

Posted: 17 Feb 2011 ?? ?Print Version ?Bookmark and Share

Keywords:EEPROM? SH7262/SH7264? IIC3s?

This application note by Renesas Electronics Corp. describes an example to read data from EEPROM using the SH7262/SH7264 microcomputers I2C bus interface 3 (IIC3) reception in single-master mode.

IIC3 is compliant to the I2C bus interface specifications invented by Philips and supports subsets, however, the configuration of registers to control the I2C bus partly differs from that of Philips.

SH7264 IIC3 has the following features:
- Format options selectable, I2C bus format or clocked synchronous serial format
- Transmits or receives data continuously

View the PDF document for more information.





Article Comments - I2C bus interface 3 recep...
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top