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Vendors keen on pushing mobile DRAM to higher speeds

Posted: 25 Feb 2011 ?? ?Print Version ?Bookmark and Share

Keywords:mobile? DRAM? LPDDR2? through-silicon-via?

An industry group is proposing a specification that will push mobile DRAM technology to higher speeds. The effort will most likely displace the next-generation projects of companies such as MIPI, Rambus, Silicon Image, as well as 3D chip vendors.

Industry body, JEDEC, is exploring the idea of extending LPDDR2 technology to run at speeds of 800MHzand perhaps 1,066MHz. Elpida, Hynix, Micron and Samsung separately have some or all of these LPDDR2 parts in the works.

Current mobile systems, including smartphones and other products, use mobile DDR interface technology running at speeds of up to 333MHz. Because the DDR interface is running out of bandwidth, a new and faster mobile interface technology called LPDDR2 is ramping up at speeds of 400MHz. A 533MHz version is in the works.

The JEDEC LPDDR2 standard offers several power-saving features and operates at a frequency range from 100- to 533MHz. Going beyond LPDDR2, vendors claim that a new technology is required to keep up with the memory bandwidth.

The candidates include MIPI, Rambus' XDR and an effort led by the Serial Port Memory Technology Consortium and an emerging serial technology. Other efforts have recently entered the picture, including a serial technology, as well as a separate wide I/O DRAM technology based on a 3D packaging technique called through-silicon-via (TSV).

The 800- or 1,066MHz devices could serve as a bridge to the next-generation technologies. Observers believe that the 800MHzor 1,066MHz versioncould also push out or stymie the other next-generation candidates. Some of these technologies may never get off the runway.

Amid the announcements in the next-generation arena, there are "discussions" within JEDEC to extend LPDDR2 to 800MHz, according to Raj Talluri, VP of product management for Qualcomm CDMA Technologies, during a panel session at the 2011 International Solid-State Circuits Conference (ISSCC) in San Francisco.

In other words, there is a push to make the 800MHz version a standard. There is also talk about extending LPDDR2 to 1,066MHz. The 800MHz version could become a standard, but it is less clear for the 1,066MHz speed.

Claiming an industry first, Samsung Electronics Co. Ltd recently began sampling a monolithic 4Gb, LPDDR2 DRAM using 30nm class technology. The chip will be used in high-end mobile applications, such as smartphones and tablet PCs. The device runs at up to 1,066Mbit/s.

Bringing 3D devices based on TSV is taking longer than expected. On the other hand, there appears to be a strong push for wide I/O DRAM technology, based on TSV. A group led by Sematech has targeted wide I/O as a driver for TSV production.

At ISSCC, Samsung announced the development of a 1Gb DRAM with a 512-pin wide I/O interface intended for mobile applications, such as smartphones and tablet computers. The chip is implemented in a manufacturing process technology somewhere between 50- and 59nm.

It will be reportedly housed in a 3D package, based on TSV technology. Shipments are targeted for 2013, said Oh-Hyun Kwon, president of Samsung's semiconductor business, during a keynote.

"Wide I/O DRAM is promising, but there are some significant manufacturing costs issues associated with the TSV technology," Qualcomm's Talluri said in a brief interview.

TSV still suffers from a lack of standards and EDA tools. Still, Elpida, IBM, Intel, Samsung, TSMC, and a plethora of others are investing millions of dollars in TSV technology.

During the panel session, Talluri outlined the proposed specifications for wide I/O, which is a 4-channel technology that could have 1-2GB densities. It is said to transfer data at 12.8- or 24.6Gbit/s. It is slated for mass production in 2014 or 2015.

- Mark LaPedus
??EE Times

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