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Development kit accelerates 3PLD creation

Posted: 28 Feb 2011 ?? ?Print Version ?Bookmark and Share

Keywords:3PLD? FPGA? ASIC? Stylus?

Tabula Inc. has announced a development kit that will speed up the creation of designs based on the company's ABAX family of 3PLDs. This development system will help FPGA and ASIC designers to implement and test a variety of parallel and serial interfaces, such as DDR3 and PCI Express Gen2, as well as embedded systems based on the V1 ColdFire soft CPU.

Tabula's Stylus cloud computing environment

The ABAX 3PLD development kit claims to be the first platform available to feature ABAX A1EC04 3PLD and provide 390k LUTs, 5.5MBytes of RAM blocks, and 48 channels of 6.5Gbit/s SerDes. The kit is equipped with x36 72 MB of QDRII RAM and x72 1GB DDR3 RAM via an LP-DIMM socket. This product aims to address designs for next generation communications infrastructure, industrial, medical, test, and military/aerospace applications.

The development kit also comes with access to Tabula's Stylus software cloud computing environment. This cloud computing environment claims to be the first integrated, synthesis and place-and-route package supporting 3PLDs devices. Stylus enables designers to access Tabula's Spacetime architecture where they can manage underlying reconfigurations transparently, automatically mapping standard RTL into Spacetime. The Stylus environment also combines synthesis technology with 3D, timing-driven, place-and-route within a flow and methodology that are familiar to FPGA and ASIC designers.

The ABAX 3PLD development kit is available in the market and is priced at $7,500.

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