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GaN power transistors eliminate current collapse, cut power loss

Posted: 31 Mar 2011 ?? ?Print Version ?Bookmark and Share

Keywords:GaN? power? transistors?

Powdec K.K. reports that, together with Sheffield University, they have developed high voltage Gallium Nitride (GaN) power transistors by creating semiconductor hetero-junction structures based on novel principles. The transistors are said to solve the problems of conventional transistors by almost eliminating current collapse, cutting power losses and realizing break-down voltages of more than 1,100V. The GaN transistors are suited for use in a broad range of equipment from inverters in consumer appliances to server power supplies, electric vehicles and industrial motors to lower power use.

GaN enables power devices to have lower power losses and higher energy efficiency compared to silicon devices. Together with the company's previously announced GaN diodes, these transistors will be core devices enabling an energy efficient, green future. Until now GaN heterojunction FETs (HFETs) that were developed suffered from a current collapse problem where current decreases and on-resistance increases during operation. To suppress this phenomenon, various techniques have been developed including metal field plates attached to the gate electrode to decrease the electric field and surface passivation to suppress gate leakage; however improvement in device performance is still not sufficient.

HFET structure

In Powdec's breakthrough solution, instead of a conventional metal field plate, which has hit its limits, a thin film of p-type GaN (p-GaN) is used. Powdec succeeded in realizing a polarization effect in the top and bottom interfaces of the AlGaN (aluminum gallium nitride) layer where equal negative and positive charge is generated, creating a 2 dimensional hole gas (2DHG) and 2 dimensional electron gas (2DEG) at the interfaces. This polarization effect almost completely suppresses both the current collapse and current leakage at the gate of the HFET. This is a similar effect seen in silicon super junction devices where the entire length of the gate-drain channel is depleted (high resistance), and the electric field is distributed uniformly along the channel, enabling these GaN transistors to sustain high breakdown voltages.

Powdec solved the difficult issue of realizing a high hole density in collaboration with University of Sheffield. This allowed a two dimensional hole gas of high hole density, 1.3 x 1,013/cm2, to be achieved for the first time in the world.

These transistors with a gate-drain distance of 22mm, in the off-state, sustainable voltages of over 1,100V are achieved, even without surface passivation. At 1,100V, drain and gate leakage current is 0.3mA/mm and on-resistance is at 6mW.cm2. In a dramatic comparison to conventional HFETs, there is no current collapse at a stress voltage of 350V.

Going forward, Powdec's breakthrough HFET technology can be easily combined with 'normally-off' structures. Powdec plans to shift growth of the devices to large diameter silicon wafers, with aims to have these energy efficient, high voltage products shipping in volume in 2 to 3 years. To accelerate the market adoption of these innovative, low-power GaN devices, Powdec is actively expanding its partnerships worldwide.

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