Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > Processors/DSPs
?
?
Processors/DSPs??

Pentek expands FPGA board family

Posted: 28 Apr 2011 ?? ?Print Version ?Bookmark and Share

Keywords:bandwidth? communication? channel? radio?

Pentek Inc. expands its Cobalt family of Xilinx Virtex-6 FPGA boards with the release of Model 71662 four channel, 200MHz, 16bit data acquisition board with built-in digital down converters (DDCs). With an input bandwidth from 300kHz to 700MHz, the board is suitable for direct connection to IF or RF ports of communications, unmanned autonomous vehicle (UAV) and radar systems for real-time DSP tasks such as demodulation and decoding. Together with Pentek's ReadyFlow board support package, with its built-in command line interface and signal viewer, the Model 71662 forms a complete solution for data acquisition, processing and analysis.

"With 32 channels of multiband DDC, the Model 71662 represents the highest channel count product in our Cobalt family. This is perfect for communication applications where a multitude of channels need to be intercepted and received in parallel," said Rodger Hosking, vice president of Pentek.

"In addition to the on-board resources, Pentek provides the components that enable customers to easily build, customize and integrate their own system application. GateFlow enables custom FPGA IP (intellectual property) development, and the ReadyFlow board support libraries and command line interface allow engineers to quickly get up and running," Hosking added.

The Model 71662 provides four transformer-isolated input channels that each supply a Texas Instruments ADS5485 16bit, 200MHz ADC. The ADC outputs pass to an input multiplexer that supports four Acquisition IP modules factory-installed in the Xilinx Virtex-6 FPGA. Each IP module can receive data from any of the four ADCs, or from a test signal generator, providing highly flexible input and antenna assignments.

Four 512 MB DDR3 SDRAM memory banks, one for each IP module, can buffer data in a FIFO mode or store data in a transient capture mode. All memory banks have DMA engines for streaming data at up to 1600 MB/second through the PCIe interface to off-board storage or additional processing. These linked-list engines give a unique acquisition Gate Driven mode in which the gate duration determines the transfer length, eliminating the need for pre-set transfer lengths. To simplify post-acquisition analysis of multichannel data, the DMA engines can automatically construct meta-data packets that contain information such as channel ID, a sample-accurate time stamp and data length.


1???2?Next Page?Last Page



Article Comments - Pentek expands FPGA board family
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top