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Springsoft software adds advanced verification tech

Posted: 16 May 2011 ?? ?Print Version ?Bookmark and Share

Keywords:verification? qualification? methodologies?

SpringSoft Inc. announces advancements to its Certitude Functional Qualification System that will enable broader and more efficient deployment of verification qualification methodologies.

New detection automation and checker qualification capabilities are among the key innovations developed to quickly identify potential problems in chip verification environments with fewer resources and drive continuous improvements throughout the verification flow. The Certitude software is said to be the only commercially available tool to objectively qualify the checking mechanisms and stimuli (tests) used for functional verification of IP modules and SoC designs. The expansion of the Certitude technology platform is aimed at checking critical functionality earlier and more frequently to ensure with high level of confidence that verification environments are 'signoff' quality.

"Certitude is becoming an essential part of functional verification signoff flows," says George Bakewell, director of product marketing at SpringSoft. "With the new automation technologies and infrastructure improvements in our latest release, Certitude provides meaningful information faster on the quality of chip verification environments, so engineers can prioritize their efforts and more effectively utilize system resources. More importantly, we're also extending the use model for functional qualification to earlier in the verification flow, and not just a point tool used at the end of the process, to help SoC teams get to signoff sooner with higher quality designs."

SpringSoft's Certitude software combines patented automation technology with mutation-based techniques and static analysis to measure effectiveness, identify significant weaknesses, and improve the quality of results for HDL simulation-based verification. In simple terms, the system injects faults (artificial mutations) into the register transfer level (RTL) version of designs and runs tests against each fault using the engineer's digital logic simulator of choice. The results provide detailed information on activation, propagation, and error detection capabilities to assess overall verification progress and to find and fix holes, such as missing functional checks, incomplete test scenarios, and infrastructure problems. Analysis of faults that don't propagate or are not detected by the verification environment points to specific problems in the stimuli, observability or checkers with feedback to help correct them.

New fault detection, ranking and tracking functions have been added to the Certitude technology platform to provide important feedback faster, refine results, and simplify fault analysis throughout the verification flow. When the Certitude system finds a non-detected (ND) fault, it automatically drops other faults related to that ND fault so as to not waste valuable cycle time. This capability has been refined over multiple software releases, initially based on logic cones. The system now allows fault dropping with an extended logic cone approach that expands the dropping criteria beyond a single cone to further minimize the 'noise' factor. Engineers can find high priority ND faults much faster. The new fault ranking and prioritization capabilities offer guidance on which ND faults within a specific fault class to analyze first and which test to use for investigation. Test cases for a given ND fault are automatically ranked based on their impact on the output when propagated.

When enough important results are found, the Certitude system automatically stops so engineers can incrementally analyze, fix and eliminate problems. The detection auto stop feature relies on predefined criteria, such as prioritized fault classes and ND faults within a class, to define a reasonable stopping point based on verification goals. In addition, because design code often changes between Certitude runs, the tool employs an automated fault ID scheme to transparently map fault IDs and maintain consistency in the reports used to analyze results.

As part of its Certitude platform expansion, SpringSoft will also introduce a new mode for deployment early in the verification process to measure how well the environment detects unspecified behavior. In most SoC verification environments, the checker infrastructure is typically in place before all the tests are written. The new mode is designed to generate fast results with less simulation resources in order to provide early indicators of checker effectiveness and reveal problems, such as incorrect or missing checkers. In addition, SpringSoft's product roadmap will extend further the range of Certitude applications in an effort to make functional verification sign-off more complete. Development efforts include areas such as improved application at the SoC level and enhanced assertion support.





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