Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > FPGAs/PLDs
?
?
FPGAs/PLDs??

Array features 1 million ASIC gates

Posted: 28 Jul 2011 ?? ?Print Version ?Bookmark and Share

Keywords:ASIC gates? analog resources? FPGA?

Triad Semiconductor Inc. has released its largest configurable array to date, the VCA-6. The VCA-6 combines precision, high performance analog resources (more than 100 op-amps) with over a million ASIC gates on a single configurable device allowing designers to sweep up an entire board of components into a single ASIC.

The VCA-6 is fabricated on IBM's 0.18?m 7RF process optimised for mixed signal performance and digital integration. With onshore fabrication and a complete ITAR design and supply chain, the VCA-6 is designed for defense applications seeking a cost effective way to secure design IP and manage long-term supply requirements. Applications benefiting from integration onto a VCA-6 include: software defined radio, sonar, smart sensor fusion, FPGA plus analog replacement, UAV controllers and designs needing obsolescence or end of life (EOL) replacement solutions.

The VCA-6 contains 320 configurable logic tiles. Each tile contains 3,150 NAND2 equivalent ASIC gates providing the array with a total of 1,008,000 ASIC gates. Unlike FPGAs, VCA-6 logic gates are not "equivalent system gates" but actual standard-cell gate primitives providing the size, performance, and power profile typical of a standard-cell digital ASIC implementation. Each logic tile also contains a 4,608bit 2-port static RAM organised as 128 words by 36bits. The array also contains a total of 160Kb of via configurable non-volatile read-only memory (ROM) arranged as 160 1Kx8 ROMs. The distributed RAM and ROM resources can be configured into larger composite memories using Triad's ViaWare memory generator. The VCA-6 has over 100 op-amps with each op-amp surrounded by configurable collections of resistors, capacitors, transistors, and switches. The analog resources are arranged into single-ended analog tiles, fully differential analog tiles, resistive DAC tiles, bias tiles, and current steering DAC tiles. A single Via-Only mask layer change configures and interconnects these analog and digital resources into a wide range of mixed signal circuits. If the design can be conceived of as an interconnection of op-amps, resistors, capacitors, logic and memory then the design can be implemented on a Triad VCA.





Article Comments - Array features 1 million ASIC gates
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top