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Understanding power issues in SDI products (Part 2)

Posted: 22 Aug 2011 ?? ?Print Version ?Bookmark and Share

Keywords:Power-supply? serial digital interface? low drop-out regulator?

The resulting noise-related issues are difficult to predict and mitigate, making the choice of a power module attractive, given most of these issues are addressed in the module's design. However, even power modules can have switching-related noise on their outputs, including the modules shown in Table 1.

In addition to the large value of capacitance used to filter the voltage ripple, adding a small-value ceramic capacitor on the output can help reduce the voltage "spikes" that are often seen on the output. There are numerous theories on selecting the value of this capacitor, but selecting the value based on its resonant frequency (Equation 1) and matching the resonant frequency to that of the ringing of the voltage spike is effective.

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In general, the goal is to create a low-impedance AC path to ground for this high frequency noise. This capacitor is typically effective with a value of 1?F or less. The benefit this capacitor contributes will be enhanced if the capacitor's parasitic inductance, along with the inductance contributed by the PCB layout, is limited.

The inductance for a small (0603 or 0805 size) ceramic capacitor is typically about 1nH of inductance, so it is of little consequence. The parasitic inductance resulting from the layout of the capacitor can be a bigger contributor given trace inductance can be about 10nH/in. and each via will add about another 1nH.

So, it's best to minimize trace length by dropping power and ground vias to their respective planes at the capacitor mounting pads, which should be placed right at the output of the regulator. Placing this capacitor on the board, even if unmounted, is cheap insurance.

Low noise and high PSRR
LDO regulators are a common choice for powering a quiet voltage rail, and for good reason, given their high power supply rejection ratio (PSRR). This is often a good decision, but without proper care in the selection of the LDO, the results could be far less than desired.

The PSRR is the ratio of the input power supply noise/ripple and the amount that is transferred to the output of the regulator in decibels (dB). The PSRR of a LDO is characterized by imposing a sinusoidal signal on the DC input voltage and varying its frequency over some range and measuring the amount of signal passed through to the output.

Of course, the ripple and noise on the output of a SMPS that feeds a LDO is not sinusoidal, but instead is a complex mixture of ripple and switching-related artifacts. If viewed in the frequency domain, one would see that the voltage ripple and switching related noise contain signals well above Fsw. This puts considerable demand on the LDO for higher frequency signal attenuation. However, the bandwidth limitation of the internal error amplifier in an LDO results in a PSRR that rolls off with frequency.

The LDO with the PSRR curve in Figure 2, shows the PSRR at 1kHz = 75dB; however, at 1MHz, the PSRR is reduced to 22dB. Many LDOs have a PSRR near zero above a few hundred kilohertz. Careful LDO selection is important, otherwise, the result will be more noise and ripple on the output of the LDO than expected.

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Figure 2: LP5900 PSRR: PSRR at 1kHz = 75dB; however, at 1MHz, the PSRR is reduced to 22dB.

The LDOs in Table 2 have sufficient PSRR in the frequency range of most contemporary switch-mode supplies. Based on the PSRR curves intrinsic to an LDO's architecture, the LDO should be considered a high-pass filter for power-related input noise. Understanding the frequency content of the noise and ripple on the voltage input of the LDO will help in selecting a regulator with sufficient PSRR to power noise sensitive devices.

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Table 2: Low-noise LDO selection (2.5V and 3.3V out)

Power Pi filter
When the PSRR of a LDO is incapable of rejecting higher-frequency noise, consider using a -filter (pi filter) on the output of a SMPS or between a SMPS and a LDO, as shown in Figure 3. A pi filter is typically comprised of two ceramic capacitors and an inductor or ferrite bead as shown (C2, L1 and C3) in the schematic.

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Figure 3: Example of a low noise/ripple voltage source. (Click on image to enlarge.)

The choice of whether to use an inductor or ferrite bead in the pi filter depends on the frequency of the voltage ripple or "noise" that needs to be filtered out. In general, inductors are a good choice for further reducing voltage ripple, whereas ferrite beads are useful for filtering high frequency content from power; like switching-related artifacts, i.e. voltage spikes.

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