Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > Processors/DSPs
?
?
Processors/DSPs??

Integer DSP core processes 100 GMACs/s at 1W

Posted: 23 Aug 2011 ?? ?Print Version ?Bookmark and Share

Keywords:integer DSP? cellular applications? processors?

Tensilica Inc. has announced the release of the BBE64 core, an integer DSP core for next-generation cellular applications and is a new instruction set architecture based on Tensilica's LX4 core. Tensilica began work on the architecture in early 2010 and is now sampling design kits for it to key customers.

According to the company, when made in a 28nm process, the BBE64 can compute 100 GMACs/s at less than a Watt.

"We are trying to build a world-leading DSP core, arguably the fastest DSP core yet," said Chris Rowen, Tensilica founder and chief technologist in a talk at a Hot Chips event.

The BBE64 combines SIMD and VLIW concepts and lets designers configure processors for a range of handset and base stations uses. Rowen said the core runs at data rates of "a few hundred megahertz" and could process 22 MIMO LTE Advanced signals at 1Gb/s across 100MHz of spectrum.

The company has completed the BBE64 programming model and generated RTL based on it. The core could support designs up to more than a million logic gates, compared to the LX4 which could be implemented in as few as 8,000 gates, Rowan said.

Although the BBE64 is a single core, it uses many instances of low-level blocks such as adders, shifters, arithmetic-logic units and multiple-accumulate units. Competing cores use simpler pipelines but multiple instances of cores on a chip.

BBE64

The BBE64 includes many parallel instances of low-level blocks.

The BBE64 is currently limited to integer math. A floating point version has "been defined, but has not been designed yet," Rowan said.

Currently, Texas Instruments Inc. (TI) is shipping chips using an array of eight DSP cores that computes 320 GMACs/s and 160 GFlops. TI uses a single core that handles both integer and floating point math.

Using separate integer and floating point cores would cost extra die area and power, one TI engineer said. Integer math lacks the accuracy of floating point calculations and would require programmers to make complex conversions, he said.

- Rick Merritt
??EE Times





Article Comments - Integer DSP core processes 100 GMACs...
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top