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Using performance monitor unit on e200z7 core

Posted: 18 Oct 2011 ?? ?Print Version ?Bookmark and Share

Keywords:Performance Monitor Unit? execution profiling?

The e200z7 core, built on Power Architecture technology with a 10 stage pipeline and dual issue, Harvard architecture core implementation running up to 264MHz/600 DMIPs has integrated DSP and floating point capability. It also has the capability to reduce code footprints by up to 30% for increased code density and reduced memory size requirements by using Variable Length Encoding (VLE). The e200z7 core, which can be found on devices such as the MPC5674F, has a Performance Monitor Unit (PMU) to support execution profiling. This application note describes the PMU components, their function and how to use this feature to improve the software performance by understanding what the software is doing and exactly where the performance bottleneck happen.

View the PDF document for more information.

Originally published by Freescale Semiconductor at as "Using the Performance Monitor Unit on the e200z760n3 Power Architecture Core".

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