Increase 1V to 1.8V at 90% efficiency with microwatt charge pump

Boosting the output voltage of common alkaline button-cells to at least 1.8V, as needed by microcontrollers, provides an "always on" standby power source sufficient for low-power oscillator interrupt/sleep state operation.

In this design, two ultra-low-power op amps are used in a charge pump configuration to double an input voltage, creating an output voltage of approximately 2× the input voltage. Output currents up to 100?A are available at 90% efficiency; even load currents as low as 10?A achieve 80% efficiency, beating commercially available charge-pump ICs and inductor-based boost regulators.

When the microcontroller wakes, primary power may be fed in at diode-OR point at C4 from a separate power supply capable of providing the full on-state power. In a typical scenario, an interrupt causing the microcontroller to wake also enables the primary supply, which may be an inductor-based boost regulator. This primary supply remains on as long as the microcontroller requires full power, and shuts down when the microcontroller goes to sleep, allowing the micropower charge pump to take over providing low power at high efficiency.

In very-low duty-cycle systems, where the microcontroller spends the majority of its life sleeping, while waking only rarely to make measurements or respond to a stimulus, the low-power sleep-state current draw largely defines the battery life. Thus, the efficiency of the micropower boost regulator becomes critically important.

Referring to figure 1, op amp U1 is configured as a relaxation oscillator, serving as the master charge-pump clock. Capacitor C2 charges and discharges primarily through resistor R4 to set the frequency, and U1's output directly drives the bottom of flying capacitor C3 between IN and GND voltages.

Amplifier U1, the 0.8V/0.6?A TS1001 op amp from Touchstone Semiconductor, is suited to the task, as it has the unusual combination of sub-microamp supply current, sub-1V operation, and reasonable output drive capability to charge C3.

Amplifier U2 is configured as a comparator slaved to the timing cycle established by U1, ensuring proper turn-on and turn-off timing for T1. T1, a low-threshold P-channel MOSFET, turns on when U1's output is low, allowing C3 to charge to the voltage at IN; however, this timing is phased to ensure a clean break-before-make (T1 turns off before U1's output goes high, and doesn't turn on before U1's output is already low).

This is accomplished by U2 switching based on the voltage of C2 at a different threshold than U1, set by R5, R6. NPN transistor T2 inverts the U2's output to drive the gate of T1, and isolates U2's output from the output voltage (U2's maximum supply voltage is 2.5V).

Flying capacitor C3 is dimensioned to shuttle charge between IN and OUT with a minimum voltage discharge even at slow charge pump frequencies to maximize efficiency. Similarly, output capacitor C4 must hold charge between cycles with the maximum load. At these low currents, leakage currents must be controlled because they directly affect efficiency, so compact surface-mount ceramic (not tantalum) capacitors should be used.

Schottky diode D1 exhibits a 1?A reverse leakage; so the 1N5817 may be substituted with a lower-leakage, higher forward-drop diode such as the BAT68 which doubles the forward drop but reduces leakage by an order of magnitude.