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Benefits of anti-fuse NVM in 28nm high-K metal gate

Posted: 28 Oct 2011 ?? ?Print Version ?Bookmark and Share

Keywords:high-K metal Gate? non-volatile memory? Anti-fuse? e-fuse?

With 28nm high-K metal Gate (HKMG) semiconductor production ramping in 2012, system-on-chip (SoC) designers face the silicon real estate and economic incentive to integrate more functionality on-chip. One function that continues to be challenging for on-chip integration is non-volatile memory (NVM) despite its many advantages. At smaller process geometries, especially 28nm HKMG, the challenges to integrating NVM such as flash, pseudo flash, and e-fuse are effectively addressed with an anti-fuse solution.

Alternative NVM solutions
Perhaps the most common form of NVM is erasable many-time-programmable (MTP) embedded flash. A second form of NVM is pseudo-flash that can provide one-time- or few-time programmable (OTP/FTP) storage. A third form that provides OTP is e-fuse (electrically programmable embedded fuse). It blows a metal or poly link to store a bit of data. A fourth form, also OTP, is anti-fuse, which when fabricated is blank and may be programmed to a 1 by using gate oxide breakdown to create a low resistance conductive path.

The benefit of integrating flash on chip comes at the price of the added steps required to merge flash onto the logic process. As a result an embedded flash process typically lags the current state-of-the-art logic process by three generations. Combined flash and logic processes are starting to be available at 90nm, whereas standard logic process is ramping production in 28nm. As a general rule, the logic-flash process combination adds a 30- to 40-percent cost premium to the wafer. Thus, using an embedded flash process makes sense if the integrated flash constitutes over 50 percent of the total die area.

A variation of MTP flash is few-time-programmable (FTP) and one-time-programmable pseudo flash that uses a floating gate to trap electrons. It has fewer processing steps to implement than flash but suffers similar scaling challenges. Like the merged process flash, it too is not readily available in advanced process technology nodes due to the higher oxide leakage of advanced process oxide.

Yet another OTP solution is e-fuse. E-fuse has the advantage of being implemented in a standard logic process. The foundry provides e-fuse to SoC designers at a nominal charge, a plus for the foundry since the chip must be redesigned to use the e-fuse of another foundry. For the large number of applications that require a small amount of NVM storage, 4kbit or less, e-fuse provides a good solution at 40nm and above. If the application requires higher capacity, the real estate cost of adding additional instances begins to rise. At 28nm HKMG, e-fuse is a less optimal solution, especially when metal is used for manufacturing the fuse link.

Benefits of anti-fuse
Anti-fuse is the other form of OTP that provides NVM storage. Its advantage over flash and pseudo flash is that it is completely compatible with the standard logic process and easily scales with each new process generation. Anti-fuse technology has unique features that are ideally suited for high growth applications that require the use of smaller process geometries:
? Built on a standard logic process and using an ASIC operational flow,
? Tamper-resistant for secure data storage,
? A wide variety of storage capacity options, and
? Extended operating temperature range essential for automotive or industrial applications

Standard logic process
Because anti-fuse is built on a standard logic process and ASIC operational flow it is available on the most advanced process node including 28nm HKMG. It easily scales with each new process generation. Silicon data for 28nm HKMG shows that existing anti-fuse bit cell can scale to 20nm and beyond. Using a standard ASIC test flow means there are no special erase or bake requirements during test. And availability of built-in self-test (BIST) and repair provides for highly enhanced field programming yield, where failure cost is much higher.

With the advent of smartphone and follow-me media, SoC designers need a secure embedded storage medium for containing encryption keys and other security information that ensure secure digital rights management. Anti-fuse technology is the best alternative for keeping this data safe. Tampering using passive techniques such as current profiling to determine the word pattern is unsuccessful with anti-fuse. This results because anti-fuse bitcell current for "0"s and "1"s are much smaller than the current required for sensing or to operate the peripheral circuits to read the memory.

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