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DTV decoder targets HD STB, IDTV market

Posted: 04 Nov 2011 ?? ?Print Version ?Bookmark and Share

Keywords:DTV decoder? set top box? multidecoder processor?

Fujitsu Semiconductor Asia Pte Ltd (FSAL) has unleashed a new member of its MB86H61 series, the MB86H611. The HDTV multidecoder processor touts an advanced security architecture and has been certified by NAGRA.

With the rapid growth of the operator market around the globe, content protection has become increasingly important to industry players, particularly in emerging markets. FSAL has leveraged its expertise in the cost-sensitive free-to-air STB market for the development of paid TV solutions. Compliance with NAGRA's on-chip security requirements version 1.1 (NOCS 1.1) enables the MB86H611 to run NAGRA's latest products on Fujitsu's platform.

The MB86H61 series is a highly integrated HD multistandard DTV decoder designed to meet the needs of the globally expanding HD set top box (STB) and IDTV market. The MB86H61 is a single-chip video decoder that supports H.264/AVC, MPEG-2, AVS and VC-1 video decoding in HD resolution with up to 1080p 50/60Hz output.


MB86H611 supports H.264/AVC, MPEG-2, AVS and VC-1 video decoding.

Core processing units include a high performance ARM 1176JZF-STM CPU with more than 475DMIPS, an advanced programmable audio processor that offers the full flexibility of decoding MPEG1 layers 1, 2 and 3 (MP3), HE-AAC, Dolby Digital and Dolby Digital plus and a 2D graphic engine to accelerate OSD. Rich interfaces consist of copy-protected HDMI, CCIR656 (SD) or SMPTE 296M/274M (HD) for video output; 4x I2S from 8-192kHz, SPDIF and stereo audio DAC for audio, as well as eSATA/SATA 3Gbit/s, SDIO, two USB 2.0 and 10/100 Base-T Ethernet MAC. A deep power-down mode reduces power consumption during standby mode, claimed FSAL.

Samples of the MB86H611 chipset are available and the development of STBs embedded with NAGRA's Conditional Access System (CAS) and Digital Rights Management (DRM) products have begun.

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