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RTL sol'n yields ultra low-power design

Posted: 14 Nov 2011 ?? ?Print Version ?Bookmark and Share

Keywords:RTL? low power application? IC package design?

Apache Design Inc. has unveiled the register-transfer-language (RTL) Power Model (RPM). The company claimed that this is a first-in-class technology geared to optimize power-sensitive applications. RPM bridges the power gap by accurately predicting IC power behavior at the RTL level with consideration for how the design is physically implemented, noted Apache.

The technology, added the company, helps to enable chip power delivery network (PDN) and IC package design decisions early in the design process, as well as to ensure chip power integrity sign-off for sub-28nm ICs.

As a new offering to Apache's PowerArtist-XP software, RPM's core technologies include PowerArtist Calibrator and Estimator (PACE) for accurate power estimation at the RTL level prior to availability of physical layout as well as Fast Frame-Selector for critical power-aware cycle selection, said Apache.

PACE uses proprietary data-mining and pre-characterization techniques to create higher-quality power and capacitance models, as compared to traditional wire load models tuned for timing closure. By considering characteristics for various circuit types such as combinational logic and sequential elements, PACE delivers RTL power within 15 percent of gate-level power, leading to more cost-effective and higher-quality results, stated the company.

Fast Frame-Selector technology performs power analysis on RTL simulation vectors and selects a set of the most power-critical cycles to use throughout the design flow, from early design planning to final chip sign-off. It can accurately identify a few cycles representing the transient and peak power characteristics from millions of vectors within hours, improving productivity and ensuring power sign-off integrity, Apache explained.

RPM enables a comprehensive power methodology by providing physical-aware RTL power data. Apache's RedHawk leverages RPM to perform PDN prototyping then generates an early-stage Chip Power Model (CPM) that is used by Sentinel software for IC package design planning, such as substrate layer selection and decap optimization. RedHawk also uses RPM to provide more-realistic switching activities for accurate power sign-off.

Designing for low-power applications requires a methodology that addresses power budgeting and allows timely cost-sensitive decisions related to power. Apache added that PowerArtist-XP software with RPM technology is ideal for advanced node designs of low-power applications including mobile, green computing and consumer electronics devices.

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