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Carbon nanotube beats copper in 3D integration

Posted: 14 Dec 2011 ?? ?Print Version ?Bookmark and Share

Keywords:TSV? 3D integration? carbon nanotube?

The sphere of electronics has been buzzing with discoveries and innovations as of late. One of them is 3D integration. The process aims to densely package components and reduce component sizes. When stacking chips vertically, the most effective way to interconnect them is with electrical interconnects called through-silicon vias (TSVs). They go through the chip, instead of being wired together at the edges.

Recently, Researchers at Chalmers University of Technology have demonstrated that two stacked chips can be vertically interconnected with carbon nanotube vias through the chips. The industry thus far has primarily used copper for this purpose. However, copper has several disadvantages that can limit the reliability of 3D electronics. Another major issue involves cooling when the chips get hot. The excellent thermal qualities of carbon nanotubes can play a decisive role in this respect, noted the researchers.

They have been working with carbon nanotubes as conductive material for TSVs. According to Kjell Jeppsson, a member of the research team at Chalmers, carbon nanotubes, which are tubes made of graphene with walls only one atom thick, are going to be the most reliable of all conductive materials if it is possible to use them on a large scale.

"Potentially, carbon nanotubes have much better properties than copper, both in terms of thermal and electrical conductivity. Carbon nanotubes are also better suited for use with silicon from a purely mechanical point of view. They expand about the same amount as the surrounding silicon while copper expands more, which results in mechanical tension that can cause the components to break," added Jeppsson.

They have also shown that the same method can be used for electrical interconnection between the chip and the package.

carbon nanotube

Two chips have interconnects that are filled with thousands of carbon nanotubes. The chips are then bonded with adhesive so that the carbon nanotubes are directly contacted. A connection using two such interconnects is pictured to the right. Image credit:�Teng Wang, Kjell Jeppson, Lilei Ye, Johan Liu. Carbon-Nanotube TSV Interconnects for 3D Integration. Small, 2011, Volume 7, pages 2,313C2,317. Copyright Wiley-VCH Verlag GmbH & Co. KGaA. Reproduced with permission.

"One difficulty involves producing carbon nanotubes with perfect properties and with the length we need to go through the chip. We have produced tubes that are 200?m long, which can be compared to the diameter which is only 10nm. Their properties, however, are not yet perfect," said Teng Wang, graduate student and part of the research team. He has developed a technique to fill TSVs with thousands of carbon nanotubes. The chips are then bonded with an adhesive so that the carbon nanotubes are directly contacted and can thus conduct current through the chips.

For the method to be transferred to industrial production, manufacturing temperature needs to be reduced to a maximum of 450C. This is a great challenge since carbon nanotubes are currently "grown" at a minimum of 700C.

If successful, entirely new possibilities will arise for future shrinking of electronicsnot least in terms of improved performance. The 3D integration using TSVs provides significantly quicker signal transfers than traditional integration where chips are placed next to each other. Furthermore, TSVs with carbon nanotubes provide less expensive production compared to the technology that uses copper interconnects.

"There are several projects involving 3D integration underway in the industry, but there are potential problems with both cooling and reliability since they use copper," continued Jeppsson. "If our method works on a large scale, I believe it will be in production within five years."

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