TSMC pushes thru with 3D chip
Keywords:3D IC? 3D chip stacking? TSV?
Seen as a strategic new direction in chip design at a time when progress is becoming more difficult in the traditional scaling of semiconductor process technology, 3D chip stacking has never left the industry drawing board. However, foundries, packaging houses and integrated chip makers are still debating how to address the technical challenges in making 3D stacks.
TSMC claims its approach will be simpler, cheaper and more reliable than using multiple foundries, packaging houses and other partners. It is focused on creating so-called through-silicon vias (TSVs) early in the process, then adding packaging capabilities to its fabs.
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"Some, but not all our customers want us to work with other partners, but many customers like our approach very much." |
The Taiwan chip maker made 3D test chips for about five companies including Xilinx that used Amkor as a packaging partner. These 'first wave' 3D customers will be able to continue using external partnerships if they choose, "but for new customers we have this one proposal, one [integrated] solution," noted Doug Chen-Hua Yu, senior R&D director at TSMC.
Using a single foundry reduces shipping that can crack the thin wafers needed for 3D ICs and lessens confusion of who is liable for a broken product. TSMC also believes it can lower costs by eliminating unneeded steps at lower capital equipment costs than packaging houses, Yu added.
"This new proposal is only two or three quarters old because we worked with many customers in this area and we found out [reliability issues] had become much worse, more risky and complicated. Someone has to come forward to assume the responsibility and take on the challengesthis is a new ball game, and the old way of doing business is out of date, I'm afraid," Yu explained.
Xilinx plans to continue using a mix of foundries and packaging houses such as TSMC and Amkor to make its so-called 2.5D chips such as the Virtex 2000T. "In general, the fabless industry would like more degrees of freedom," reckoned Ivo Bolsens, CTO of Xilinx. "I don't see any technical reason against any particular design flows."
Analysts noted TSMC will face plenty of competition and may be forced into being more of a team player. "TSMC makes a very compelling case [for going it alone] but others won't lie down or go awaythere's a lot of money in play here," stated Jeff Perkins, president of Yole Inc.
- Rick Merritt
??EE Times
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