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Precisely measure signals in weigh scale

Posted: 12 Jan 2012 ?? ?Print Version ?Bookmark and Share

Keywords:digital weigh scale? industrial measurement? ADC?

Nonlinearity: Load cells being mechanical devices, they have their own nonlinearity based on their construction. A typical nonlinearity of a load cell is about 0.015% of the rated output, which is approximately one bit when the ADC is sampling at 13 bits. However, one has to bear in mind that this is just one of component of nonlinearity which is contributed by the load cell in the complete system. The measurement system and analog front end would have their own contributions into the systems' total nonlinearity as well.

Hysteresis: Hysteresis error is seen as the change in load cell output when a known load is reached from a lesser weight as compared to when it is reached from a higher weight. This is caused due to deformation properties of the material used in construction of the load cell. A higher weight may temporarily deform the load cell, which effectively adds a small offset that would show up when the target was reached from a higher weight.

Repeatability: This specification defines the change in the load measured by the load cell when the same weight is placed multiple times on the same load cell.

Creep and creep recovery: Creep is the measure of change in measured weight over time, such as when a weight is placed on a scale for a long period of time. For example, output counts will be different when the weight is just placed and 30 minutes after. This effect is based on the elastic property of the material used in the load cell. Cheaper materials can result in very large creep values and it may take a long time for the load cell to recover from the deformation.

System precision
Most weigh scale designers would have two different resolutions C the display resolution and the internal resolution. The display resolution is the resolution of the end result displayed by the weigh scale. The internal resolution is the actual resolution on the internal analog front end.

Now let us consider a weighing scale in which the load cell excitation voltage is 5V. In this case, its output voltage will be 0-10mV with a 2mV/V sensitivity. If the weighing scale has to be designed for a resolution of 5g and a total range of 10kg, the weigh scale's display resolution will be 1:2000. As mentioned earlier, in weighing scales display resolution is different from internal resolution, and it is standard practice to have internal resolution about 20-30 times of display resolution. So, for this weighing scale, the internal counts needed are 1: 60000. This corresponds to a 16bit internal resolution.

There are multiple means of induced error in the load cell interface starting with errors in the sensor itself, as discussed earlier. For this reason, the internal resolution is kept higher than the display resolution so that the design can compensate using some of the extra resolution.

The design would have to resolve the 10mV range of input with a 16bit resolution. To measure this 10 mV full range output, the most commonly used method is to implement a gain stage to gain the input signal to fit the ADC's input range, as shown in figure 1, thus resolving more bits inside a smaller range. For example, to have a measurement range of 10mV as discussed earlier using an ADC that has a 1V range, the user can resort to getting close to 100x gain on the signal using an amplifier-based gain stage.

Consider an ADC with 20bit resolution and an input range of 1V. The minimum input change this ADC can is resolve is 1uV. When we use a gain stage to amplify the signal prior to applying the signal to the ADC to improve the range to 0-10mV, the lowest resolved voltage would be as small as 10nV. This kind of resolution would place us deep inside the noise domain. The gain stage amplifies the noise as much as it amplifies the signal. This noise renders a considerable number of bits of the ADC as unusable and thus reduces the effective number of bits (ENOB). Thus, designers have to pick an ADC, which gives an optimum ENOB for the required gain settings.

The most commonly used ADC to measure load cell's output is a Delta Sigma (DelSig) ADC. This ADC relies on the technique of oversampling the signal and later decimating it to achieve high resolution. This architecture makes the ADC have an inherent low pass nature that helps in reducing the effects of noise.

Having a very good ADC only solves one half of the puzzle. The gain stage is another requirement. Most designs use an external low noise amplifier for this purpose. But there are some devices in the market now like the Cypress's PSoC3 and PSoC5 that implement this gain stage in the ADCs input stage itself. The way this is achieved in the PSoC is by having an integrated input Buffer in the ADC's input that can achieve up to 8x gain. The ADC itself is capable of having a gain of up to 16x in its modulator stage.

As no external amplification stage is needed, such ADCs can provide about 18 effective numbers of bits since noise due to external amplifiers does not come into picture. But for a weigh scale application, resolution requirements are generally defined in terms of peak-to-peak resolution. This is the effective resolution calculated for a system after taking out the effect of the noise as a peak-to-peak value.

The general requirement for a commercial market space is 16bit peak-to-peak resolution. This resolution would have to be achieved while measuring a full range of 10mV. The major concern would be dealing with system noise, thus bringing down the effective resolution.

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