Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > Amplifiers/Converters

Precisely measure signals in weigh scale

Posted: 12 Jan 2012 ?? ?Print Version ?Bookmark and Share

Keywords:digital weigh scale? industrial measurement? ADC?

Another major concern in a load cell interface is that it is prone to gain error because of how the output signal range is dependent upon the excitation voltage. Any variation in the excitation voltage can cause a similar percentage of gain error in the measurements. This can be avoided if the signal measurements are made as a ratio against the excitation voltage. This can be achieved by two means:

1) One can measure the signal and excitation voltage separately and then calculate the ratio, thus taking out the gain error. However, this method requires multiplexing of the ADC between the two signals. The other problem with this approach is that the signal we are measuring is in the 10mV range and the excitation voltage would be the volts range. This would mean dynamically changing gain settings and ADC range parameters, something that might not be advisable in most analog systems. In addition, changing these parameters dynamically would raise questions of mismatch of the two independent measurements made.

2) As shown in figure 3, the other means of achieving this is by using the reference to the ADC itself. ADCs generally have a reference pin to connect to an external reference. The input range of the ADC is defined as a factor of the reference voltage. Thus, every measurement made in the ADC is made with respect to the reference. If we provide the excitation voltage or a divided derivative of it as a reference to the ADC, we can achieve a ratio-metric measurement for the signal. Since load measurement in the load cell is a ratio of resistors, this approach fits the picture the best. Also, any variations in the excitation voltage would be unnoticed in the measurements since the ADC reference is also affected in the same way.

Figure 3: Load cell interface circuit for ratio-metric measurement.

Noise reduction by Delta Sigma ADCs
There are some redundant characteristics of the frequency response of DelSig ADCs that can be made use of to reduce noise. Being a primarily averaging ADC, DelSig ADCs have a low pass nature, which provides considerable noise reduction, as discussed earlier. However, most DelSig ADCs have a specific frequency response like a sinc response on the PSoC3 and PSoC5 ADCs. This response has specific nulls in certain frequencies that are multiples of the sampling frequency.

Hence we can align the ADCs sampling rate to a specific value and thus eliminate a specific noise band. This can be particularly helpful when trying to eliminate noises sources like 50/60Hz noise.

Moving average filter
We have discussed means to avoid noise and other sources of error in the analog signal chain for a weigh scale design. One of the final steps to achieving a noise-free output resides in using a firmware-based mathematical filter to average out noise. An easy filter to implement is a moving average filter (figure 4). It uses an array where the input values keep getting streamed in from one side and the oldest values fall off the array from the other side. At any given time, the output of the filter is the average of all of the elements in the array.

Figure 4: Moving average filter.

The moving average filter is one of the easiest yet most effective filters to achieving higher noise-free bits from the measurement system. Note that there is a constant delay this filter imposes which is proportional to the depth of the array used. That means for an 'n' element moving average filter, every change is going to take 'n' cycles to reflect itself in the output. This can be a bit misleading if there are larger variations and the output slowly catches up. This condition can be avoided by having a threshold condition check on variations. For example, if the input varies more than a threshold at a specific point of time, the whole filter is flushed and new data is copied in the filter and also into the output, thus reducing the latency for larger variations. Filter size needs to be selected dependent on the required resolution, ADC's sample rate, and response time specification of the weigh scale.

Figure 5: Integrated weigh scale solution using PSoC 3 device.

System design, integration
Until now, we have been discussing analog front-end design and different considerations to improve performance. However, an entire weigh scale solution is more than just the analog front end. Based on the application segment, every weigh scale design could have varying integral components ranging from communication interfaces to user interfaces. Figure 5 shows a typical implementation of a weigh scale solution.

?First Page?Previous Page 1???2???3???4?Next Page?Last Page

Article Comments - Precisely measure signals in weigh s...
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top