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ADCs allow concurrent signal acquisition up to 650kSPS

Posted: 20 Jan 2012 ?? ?Print Version ?Bookmark and Share

Keywords:ADC? successive approximation? programmable logic controller?

Texas Instruments Inc. has introduced the ADS8528/48/68 product lines that contain eight low-power, 12, 14 or 16bit, successive approximation register (SAR)-based ADCs with true bipolar inputs. According to the company, the channels are grouped in four pairs that allow simultaneous high-speed signal acquisition of up to 650kSPS.

The devices support selectable parallel or serial interface with daisy-chain capability. The programmable reference allows handling of analog input signals with amplitudes up to 12V. The ADS8528/48/68 family also supports an auto-sleep mode for minimum power dissipation and is available in both QFN-64 and LQFP-64 packages. The entire family is specified over a temperature range of -40C to 125C.


The device contains eight low-power SAR-based ADCs with true bipolar inputs.

The device can be used in protection relays, power quality measurement, multiaxis motor control, programmable logic controllers and industrial data acquisition. The ADS8528/48/68 tout maximum data rate per channel at 650kSPS (PAR) or 480kSPS (SER), 600kSPS (PAR) or 450kSPS (SER) and 510kSPS (PAR) or 400kSPS (SER), respectively. Likewise, the device feature signal-to-noise ratio of 73.9dB, 85dB and 91.5dB, respectively. In addition, the products register total harmonic distortion at -89dB, -91dB and -94dB.

The ADS8528, ADS8548 and ADS8568 deliver programmable and buffered internal reference of 0.5-2.5V or 0.5-3V. The scalable low-power operation using auto-sleep mode consumes only 32mW at 10kSPS, noted TI.

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