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A look at multilevel cell SSDs

Posted: 02 Feb 2012 ?? ?Print Version ?Bookmark and Share

Keywords:solid-state drives? controller? multilevel cell?

In the enterprise, accelerated access to data is the primary reason SSDs are deployed, and since flash memory cells will be written to multiple times each day, endurance literally determines the reliable life of each drive. Endurance, as well as performance, reliability and availability of MLC-based SSDs are directly dependent on the design of the SSD controller (not the NAND flash memory as many suspect). The SSD controller is the brains and responds to host commands, transfers data between the host and flash media, and manages the flash media to achieve high reliability and endurance. How effectively this controller manages the flash memory will determine whether the SSD can be used in enterprise applications that require 24/7/365 uninterrupted operations under heavy read and write workloads. The real question is can an SSD manufacturer guarantee up to 30 full capacity writes per day for 5 years using MLC media to rival the endurance capability of SLC media.

Deeper dive into Flash media wear
To store data in NAND flash memory, an electrical charge is placed in the 'floating gate' portion of the NAND cell substrate which either blocks or enables electricity flow through the gate. As the NAND cell ages (or cycles), the floating gate will break down as electrons drop out of or get trapped below it. To slow the breakdown of floating gate electrons, which in turn, improves SSD endurance and reliability, enabling technology is available that slows and softens the impact that erase, write and read operations have on NAND flash memory cells. This advanced technology is described later in the article.

To prevent the NAND flash from degrading and adversely affecting SSD reliability, error correction code (ECC) technology is usually employed as a standard feature in most enterprise-class SSDs. The ECC technology enables the built-in SSD controller to detect and correct a limited number of bit errors in each block of data.

At some point, the ECC engine will be unable to correct the bit errors coming from the NAND as it wears out, so when this occurs, the SSD controller performs a read retry (to attempt to read the data again in the hope that the data is read correctly). This double layer of protection enables SSDs to have an exceptional unrecoverable bit error rate (UBER) which enables high reliability. As the NAND flash ages, the average number of read retries required will increase, and this retry will reduce the read performance, as well as the performance of the SSD over time. What is needed is an enabling technology that slows the 'wear-out' rate of the flash so ECC and retries do not need to be applied or are not significantly delayed when needed.

In reality, the larger issue in using NAND flash is the higher electrical charge used for the erase operation, and then the write operation, that primarily impacts endurance. To materially increase an SSD's operating life, more advanced techniques are required.

Techniques such as over-provisioning, throttling, compression, and de-duplication are mechanisms for delaying writes to NAND flash memory and can be effective when deployed, but actual use of these techniques does not increase the number of times to which the flash can be written. As such, these techniques are limited in the gains they can provide. Wear-leveling, for example, doesn't actually increase endurance, but instead, the flash controller spreads the writing of each data block evenly across all blocks in the SSD device to maintain consistent and even use of the NAND blocks over the life of the drive so that one location doesn't wear out faster than any other location inside of the drive.

Improving MLC SSD endurance
To effectively improve MLC SSD endurance, advanced media management techniques need to be implemented within the SSD controller (and managed internal to the NAND flash memory). Using digital signal processing (DSP) functionality, the SSD controller can support complex management technologies such as dynamically adjusting the program and erase charges to achieve higher levels of efficiency. This enables algorithms to not only monitor how cells are being used but also predicts how reads and writes will affect performance over the long term. In this way, the algorithm can spread out cell wear to ensure consistent performance over time.

The performance, cost efficiency, and reliability of an SSD ultimately come down to the intelligence of its SSD controller. Extending the life of NAND flash memory in an SSD requires a flexible and intelligent controller architecture that can analyze and adapt dynamically to the changing characteristics of the flash cells as they age. Unmanaged MLC-based SSDs are not suitable for the continuous duty cycles and heavy workloads required for today's demanding network environments. Through the use of SSDs built with adaptive flash management algorithms and advanced signal processing techniques, IT professionals can confidently accelerate network access with near-zero downtime and advanced data protection at the lowest cost per I/O. Extending the useful life of an enterprise MLC flash-based SSD delivers a higher return on the SSD investment.

New technology
To slow the breakdown of the floating gate electrons and to flatten MLC flash reliability and endurance concerns, technology exists today that is capable of extending the life of the NAND flash memory within an MLC SSD. At STEC, we have developed CellCare Technology which is based on four generations of proprietary SSD controller architecture. CellCare Technology uses a combination of write and erase management techniques, read level adjustments, write softening techniques, DSP methods for signal/bit detection, and other management technologies (as discussed earlier) to increase NAND cell life.

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