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PCM progress report no. 6: Recent advances in phase change memory (Part 1)

Posted: 01 Mar 2012 ?? ?Print Version ?Bookmark and Share

Keywords:phase change memory? germanium antimony tellurium? scaling?

There was a point when industry experts believed that phase change memory (PCM) would revolutionize the market. Over recent months, those claims and certainties have been replaced by words like "promising" for any reported advances, suggesting there are still many problems remaining. Overhanging all the individual and disparate pieces of PCM progress is the ominous shadow of flash memory rapidly taking over the applications and market space originally claimed for PCM. Samsung1 issued what must be considered a dire warning on the ability of PCM to scale beyond 20 nm based on thermal considerations alone, as we will discuss. The same paper also acknowledged that PCM is presently stuck at the 4xnm technology node, while flash memory products already exist at the 2x node. For PCM, the window of commercial opportunity may have passed.

In this report, I have highlighted and commented on individual, and in most cases impressive pieces of PCM-related work in the areas of lithography, array-isolating devices, thermal crosstalk, new PCM materials, and more. All would appear to still be a long way from incorporation into a single PCM array that is competitive in price, performance, and bit capacity with alternative memory solutions, though. Late last year at the 2011 IEEE International Electron Devices Meeting (IEDM11; December 5-7; Washington, DC), the PCM papers progressed toward solving different PCM performance and fabrication problems at the 2Xnm, 3Xnm, 4Xnm, and 5Xnm nodes. Much of the focus of attention by researchers is on engineering of the interface between the chalcogenide layer and the lower electrode to confine the active region and minimize the reset current, which requires an optimum combination of thermal and electrical design. The PCM cell bottom electrode has grown from the simple planar structure to a number of "promising" options (figure 1). In just this one element of any potential PCM array, the complexity has increased dramatically and there is no certainty that these structures will scale to 2Xnm and below to produce useful PCM devices. The inverse relationship between complexity and yield or cost is starting to become a serious consideration for further attempts at PCM scaling.

Figure 1: Confining the active region, the growing complexity of the PCM electrode structure.

Probing the 20-nm node
The approach of Samsung was to address the scaling problems of PCM at the 20-nm node with a 4F2 cell based on the "dash" structure (figure 2).1 The notable features are the use of selective epitaxial growth (SEG) to create a high-aspect-ratio single-crystal matrix isolation diode. The engineering of the diode is impressive with a need to maintain the lowest value of forward voltage Von while at the same time reducing series parasitic resistance and maintaining a low value of W/L word line resistance without compromising the Ioff, the latter now a very important consideration in a large array. The dash cell structure is a confined PCM type, achieved by the creation of a concave upper surface for the bottom electrode.

Figure 2: The Samsung selective epitaxial growth PCM cell with cup-shaped silicide confining BE (simplified).

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