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AMD first to commercially implement low-power clock IP

Posted: 24 Feb 2012 ?? ?Print Version ?Bookmark and Share

Keywords:clock mesh technology? processor cores? Piledriver?

Cyclos Semiconductor Inc. has announced that Advanced Micro Devices Inc. (AMD) has achieved the first commercial implementation of resonant clock mesh technology it has licensed from startup Cyclos Semiconductor Inc.

Cyclos licenses resonant clock mesh semiconductor IP, design automation tools, and provides consulting services for resonant clock mesh design. The company announced a proof of concept processor implementation based on the ARM926EJ-processor in 2008 under the name "Project Elizabeth" along with the availability of design tool support.

Early on, Cyclos has formed a relationship with processor technology licensor ARM Holdings plc, leading to speculations that an ARM processor core would be the first commercial demonstration of Cyclos' technology. Instead, AMD's Piledriver 64bit core will be the first volume production-enabled implementation of resonant clock mesh technology. The processor cores are targeted to be used in Opteron server processors and client accelerated processing units (APUs).

The Piledriver is fabricated in a 32nm CMOS process and operates at up to and in excess of 4GHz clock frequency. It employs the resonant clock distribution power by up to 24 percent, while maintaining previous clock skew targets, Cyclos said.

Cyclos' resonant clock mesh technology employs on-chip inductors arranged to interact with the large capacitance of the clock signal distribution network to form an oscillating "tank circuit." The result is that Cyclos inductors and clock control circuits "recycle" the clock power instead of dissipating it on every clock cycle as conventional clock tree implementations do. The result is a reduction in total IC power consumption of up to 10 percent, Cyclos said.

"We were able to seamlessly integrate the Cyclos IP into our existing clock mesh design process so there was no risk to our development schedule," said Samuel Naffziger, corporate fellow at AMD, in a statement issued by Cyclos. "Silicon results met our power reduction expectations, we incurred no increase in silicon area, and we were able to use our standard manufacturing process, so the investment and risk in adopting resonant clock mesh technology was well worth it as all of our customers are clamoring for more energy efficient processor designs."

"We believe resonant clock mesh design will be a key enabler for GHz+ embedded processor IP blocks in next generation SoCs that also require ultra-low power consumption," said Marios Papaefthymiou, Cyclos founder and president, in the company's statement.

- Peter Clarke
??EE Times

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