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PCM progress report no. 6: Recent advances in phase change memory (Part 2)

Posted: 15 Mar 2012 ?? ?Print Version ?Bookmark and Share

Keywords:phase change memory? array? physical vapor deposition?

To help, rather than following the normal practice adopted by others of publishing the results of write/erase lifetime for one PCM device and extrapolating it to millions, IBM/Macronix4 provided a view of the distribution with write/erase lifetime, and for that they should be highly commended. They also showed that at the end of life, all devices failed open circuit at between 107 and 108 write/erase cycles. This data quickly provides the answers to one question but not all of them. The very nature of the write/erase process means there will be a statistical spread. Within the IBM/Macronix distribution, however, there are sequences where the distribution is very tight followed by sequences where the distribution becomes wide. Consideration of a single device might show this as a step function. For IBM, the first occurrence of this widening is at about 104 write/erase cycles. There have been many reports in the past, for example Lai5, that show a relatively smooth or very little by way of change in the statistical spread of resistance values early in the write/erase lifetime, followed by a sequence of much larger discontinuous changes. It is interesting to note that even these early results the change in distribution occur at 104 write/erase cycles is similar to the results of reference 4 where, from a regime of a tight distribution, a regime of larger statistical variation occurs.

The second IBM/Macronix paper6 reported write/erase lifetimes of greater than 108 cycles for a solid bottom electrode and 109 for their innovative electro-thermal contact design described earlier (figure 2b). What is particularly interesting is the solid electrode devices failed with the reset state resistance falling steadily to short circuit, while it appeared that the device with the confined bottom electrode was still operating at 109 cycles. As far as the structure of the curves, both devices showed a significant (log curve) steady parallel reduction in set/reset resistance values. Both devices had signs of what might be considered "forming" during the first 10 or so write/erase cycles.

The reason for any serious effort to understand the form of the many types of curves in figure 3 is irrespective of the particular structure and form of the curves, in terms of operation the device continues to operate in tolerance as far as the set/reset resistance window is concerned.

Reviewing the Hynix results
The Hynix results show a slight divergence in the values of the off and on state resistance and a write/erase lifetime of 108, leading to the conclusion that these changes are the result of changes in the region of the active material. Current density in the narrowest part of the electrode calculates as 1 to 2 107 A/cm2. Close examination of the curves shown in reference 1 also indicates two discontinuities in that correlate. One explanation that would allow discontinuities in opposite directions is a loss of contact between the square edge contact and the GST would be voids, or alloying. This might cause the given reset current to change the shape of the active region with a larger volume of off state material and larger crystallized volume. Another explanation might be that element separation is occurring and at some point alloying or crystallization occurs at the surface of the edge electrode, so enlarging it and allowing a better lower contact to the crystallized material. Speculation is easy; the real the answer and progress will only come from internal material analysis in order to account for all of the very different forms of the write/erase resistance curves and link them to device structure, materials and operating conditions.

Without an explanation of the cause and what is actually happening, I think for any device irrespective of source, tests on other device parameters made before the type of changes shown in figure 3 occur cannot be assumed to be valid after what are clearly significant changes. It might be more accurate to consider that a different device or a repaired device has been formed.

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