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Advantages of coupled-inductor SEPIC

Posted: 27 Apr 2012 ?? ?Print Version ?Bookmark and Share

Keywords:single-ended primary-inductor converter? low noise? coupled inductor?

The single-ended primary-inductor converter (SEPIC) has the ability to operate from an input voltage that is greater or less than the regulated output voltage. Aside from being able to function as both a buck and boost, the SEPIC design also has minimal active components, a simple controller, and clamped switching waveforms which provide low noise operation.

It is often identified by its use of two magnetic windings. These windings can be wound on a common core, in the case of a single dual-winding coupled inductor, or they can be two independent inductors. Designers are often unsure of which approach is best and whether there is any real difference between the two. This article looks at each approach and discusses the impact each has on a practical SEPIC converter design.

Circuit operation
Figure 1 shows the basic SEPIC converter with a coupled inductor. When the FET (Q1) turns on, the input voltage is applied across the primary winding. Since the winding ratio is one-to-one, the secondary winding is also imposed with a voltage equal to the input voltage.

Figure 1: The basic coupled inductor SEPIC converter.

However, because of the polarity of the windings, the anode of the rectifier (D1) is pulled negative and reversed bias. With the rectifier biased off, the output capacitor is now required to support the load during this on-time period. Additionally, this forces the AC capacitor (C_ac) to be charged to the input voltage.

While Q1 is on, current flow in both windings is through Q1 to ground, with the secondary current flowing through the AC capacitor. The total FET current during the on time is the sum of the input current and the output secondary current.

When the FET turns off, the voltage on the windings reverses polarity to maintain current flow. The secondary winding voltage is now clamped to the output voltage when the rectifier conducts to supply current to the output. Through transformer action, this clamps the output voltage across the primary winding. The voltage on the drain of the FET is clamped to the input voltage plus the output voltage. Current flow during the FET off time for both windings is through D1 to the output, with the primary current flowing through the AC capacitor.

Balancing volt-microseconds

The circuit operates similarly when the coupled inductor is replaced with two discrete inductors. For the circuit to operate properly, volt-microsecond balance must be maintained across each magnetic core. That is, the product of the inductor's voltage and time must be equal in magnitude and opposite in polarity during the FET on and off times.

It can be algebraically shown that the AC capacitor voltage, for separate inductors, is also charged to the input voltage (reference 1). If we consider the output-side inductor first, it is clamped to the output voltage during the FET off time, as was the secondary winding of the coupled inductor. During the FET on time, the AC capacitor imposes a potential equal to the input voltage but opposite in polarity across the inductor.

With defined voltages clamped across the inductor for each interval, balancing the volt-microseconds determines the duty cycle (D). This is simply:

D = Vo / (Vo + VIN),

for continuous conduction mode (CCM) operation. The voltage imposed across the input side inductor is equal to the input voltage when the FET is on.

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