Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > Memory/Storage

Data transfer rate tolerance in clock asynchronous serial I/O mode

Posted: 05 Jul 2012 ?? ?Print Version ?Bookmark and Share

Keywords:data transfer rate? UARTi? MCU?

In this document, Renesas Electronics describes the tolerance of data transfer rate in clock asynchronous serial I/O mode for the M16C/63, 64, 64A, 64C, 65, 65C, 6C, 5L, 56, 5LD, 56D, 5M, and 57 Groups. "i" in UARTi refers to a channel number. The number of channels varies according to the MCU used.

When using this application note with other Renesas MCUs, careful evaluation is recommended after making modifications to comply with the alternate MCU.

View the PDF document for more information.

Originally published by Renesas Electronics at as "Tolerance of Data Transfer Rate in Clock Asynchronous Serial I/O Mode".

Article Comments - Data transfer rate tolerance in cloc...
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top