Advanced flip chip packaging tech unveiled

STATS ChipPAC has revealed what it says is an advanced flip chip packaging technology that features copper (Cu) column bumps, bond-on-lead (BOL) interconnection and enhanced assembly processes. The fcCuBE technology is geared for high volume production for multiple customers, and the company has expanded its assembly processing capabilities for bump pitch ranging from larger than 200? to below 80?, added STATS ChipPAC.

The company said the fcCuBE technology was designed to significantly reduce the cost of flip chip packaging, expand the scalability of flip chip technology to much finer bump pitches and higher I/O densities, and eliminate stress on the delicate ELK/ULK structures at advanced silicon wafer nodes. With STATS ChipPAC's patented BOL interconnect structure in combination with Cu column bumps, fcCuBE technology has shown to effectively address each of these objectives in a growing number customer applications, the company added.

A unique feature of fcCuBE technology is the ability to support both a standard mass reflow assembly process or a thermo-compression bonding (TCB) process, the company indicated. With mass reflow, STATS ChipPAC has been able to achieve a 10-30 percent cost reduction in package designs with fcCuBE technology as compared to conventional flip chip interconnect. STATS ChipPAC has qualified fcCuBE down to 80? bump pitch using mass reflow and is in development of finer pitches, the firm indicated.

TCB is a more complex interconnect process as compared to mass reflow, providing the increased level of precision required for bonding higher density and tighter pitch flip chip configurations. For fine pitch bump requirements, TCB enables the assembly of very small bump diameters in more advanced wafer fab nodes and supports bonding requirements such as chip-to-substrate or chip-to-chip. This provides STATS ChipPAC's customers with the flexibility to select either the mass reflow or TCB assembly process with fcCuBE technology and allows a more optimized package design across the widest range of bump pitches, particularly with a co-design relationship.