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ASIC prototype system uses Xilinx's Virtex-7

Posted: 19 Sep 2012 ?? ?Print Version ?Bookmark and Share

Keywords:Virtex-7? ASIC prototype? HES-7? FPGA?

Aldec Inc. has introduced a scalable ASIC prototype system that claims to lower the cost of ASIC prototype process. HES-7 takes advantage of the Xilinx Virtex-7 2000T 3D IC that according to the company enables design capacity up to 24 million ASIC gates on a single HES-7 board. In addition, HES-7 uses a non-proprietary high-speed backplane connector that enables easy expansion of custom daughter boards or can enable up to four HES-7 boards to interconnect that provides design capacity by up to 96 million ASIC gates, detailed the company.

"Today's SoC/ASIC prototype teams are using off-the-shelf prototype boards that utilize large numbers of low density FPGAs. This makes implementing the SoC/ASIC design a painful process that requires more time-consuming design partitioning and added tool expense," noted Zibi Zalewski, hardware division general manager at Aldec. "Using a dual chip HES-7 prototyping solution from Aldec together with Xilinx's industry-leading Virtex-7 2000T devices reduces the design implementation effort and lowers the tool expense when supporting multimillion gate SoC designs."

"The HES-7 product fully leverages the power of our Virtex-7 2000T devices and our Vivado Design Suite, which together offer a strong combination of technology that accelerates time to validation and drives down the cost of the ASIC prototype process," said Kirk Saban, sr. product line manager, Virtex-7 Xilinx.

HES-7 provides SoC/ASIC hardware verification and software validation teams with a proven quality, FPGA-based, ASIC prototyping solution backed with an industry-leading 1-year limited warranty.

HES-7 is available with pricing that starts at $19,995. HES-7 is sold based on product configurations ranging from 4-96 million ASIC gates.

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