French company plans 1024 high-end DSP cores on single die

Kalray, a French chip start-up, has recently sampled a 256-core digital signal processing chip built by TSMC's leading edge 28nm technology. The chip is said to have a fraction of the power consumption of today's FPGAs. The French company is planning a version with 1024 high performance DSP cores on a single die.

The first -Purpose Processor Array MPPA-256 processor integrates 256 processors onto a single silicon chip all connected by a high bandwidth Network on Chip but typically consumes 5W for performance of 500Goperations/s. The chip also provides up to 230GFLOPS/s for floating point calculations and is aimed at custom applications in industrial markets, particularly video and telecommunications infrastructure.

Jo?l Monnier, Kalray's CEO, stated that the next stage is a smaller chip with 64 processors but then the next step will be 512 processors or with a small shrink we could go to 1024. This 1024 processor version will provide almost 3TeraOP/s of performance at 400MHz.

The company is funded with around $25m so far from a combination of French investment funds, local funds, private investors, and OSEO, a French public-sector institution who finance innovative projects from small companies. The company works closely with the French CEA lab on the architecture development and with Global Unichip on the silicon design.

Kalray is not looking at high volume design wins, but at the higher margin, custom designs that have previously used FPGAs. The lower power also allows for cheaper packaging, bringing more cost advantages both in the chip and in the system cost.

The development environment is key for DSP development as many other companies have discovered at their cost. Along with the MPPA processor family, Kalray has a software development environment called AccessCore as well as development boards integrating in MPPA-Developer. It offers standard GNU C/C++ development tools and libraries including primitives for task parallelism and data parallelism and the development environment also supports automatic mapping on MPPA hardware and memory resource sizing to assist developers in obtaining optimal performance.

Unlike other approaches, AccessCore provides a C-based programming model which speeds up application development and debug. Several programming levels are provided for different user profiles, from Linux support for legacy functions to a custom high level dataflow environment. Standard GCC & GDB technologies are used for compilation & debug.

Multiple MPPA chips can be interconnected at the PCB level through Interlaken interfaces in the same way as FPGAs to increase the processor array size and performance capability, but there are plans for larger single chip devices. The company is now ramping up for the next stage of expansion into Japan, Germany and the UK, followed by the US in the middle of next year.

- Nick Flaherty
??EE Times Europe