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LSI, Calxeda receive licenses for ARM's on chip link

Posted: 12 Oct 2012 ?? ?Print Version ?Bookmark and Share

Keywords:on-chip interconnect? CoreLink CCN-504? Amba buses? Cortex A15? DSP?

LSI's first Axxia comms processors, its first using ARM cores, will include a jointly developed interconnect initially capable of linking 16 cores.

A license from ARM Holding plc for a new on-chip interconnect developed for linking up to 32 cores on a die has recently been granted to LSI Corp. and Calxeda Inc. This is the first license to be granted for ARM's latest interconnect. ARM's CoreLink CCN-504, delivering throughput in the range of a terabit/second, will debut in LSI's first ARM-based devices.

Calxeda, a developer of ARM-based processors and software for low-power servers, says it is already building its next generation chips for datacenter servers using CoreLink technology.

LSI likely will use the interconnectknown internally as "Dickens"in a ring topology, but can also be configured as a mesh or crossbar. It scales beyond existing ARM Amba buses currently limited to linking eight cores.

The initial version of the CoreLink interconnect will handle up to 16 cores, with plans to extend it in the future to support 32. (See ARM's new on-chip interconnect delivers Tb/s throughput.) LSI will use the interconnect on its next-generation Axxia communications processor to link a range of ARM coresprobably using the Cortex A15as well as DSPs and accelerator blocks. LSI says it helped write code for the interconnect.

The coherent link supports quality of service to the cores as well as to on-chip level 3 cache and DDR memory. Ultimately, other chip makers and OEMs will also be able to use the interconnect. LSI will employ it for both standard products and as part of its ASIC service.

"This is a game changer for industry and LSI," claimed Tareq Bustami, director of LSI's wireless networking business. "OEMs want to mix and match ASICs, standard solutions and combinations of the two," said Bustami. "To do that effectively we need an interconnect anyone can use," he said of the news announced at the Linley Tech Processor Forum.

LSI and archrivals Applied Micro, Freescale and Cavium, who have previously supported only Power or MIPS cores, are now rolling out new lines based on ARM. They share a desire to leverage ARM's broad ecosystem and its relatively high performance-per-Watt capabilities at a time when several 64bit ARM cores are in the works.

Power outage
Nearly half of comms processors being shipped use Power cores. ARM trails Power, x86 and MIPS with a small sliver of the comms market, but that's set to change.

"The Power architecture is going to be losing a lot of share to ARM in the next several years," predicted Linley Gwennap, principal of market watchers The Linley Group (Mountain View, Calif.). "These companies all say they can support two architectures, but that gets expensive, so it will be interesting to see how long they can afford it," he said.

"Over the next two or three years, you will see a good chunk of both [Power- and ARM-based comms chips] being shipped, but in the long term ARM will be the majority," said Bustami.

LSI has aligned its rollout of the ARM-based chips with a software transition going on at two or three of the largest cellular basestation makers. "They develop a monster amount of code that runs on those basestations," Gregg Huff, LSI's chief technologist, said in a recent interview. "We know exactly the basestation products for which they want an ARM processor, and we are 100 per cent lined up with them," he said.

- Rick Merritt
??EE Times





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