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Micron memory skips a node, looks at 2Xnm process

Posted: 19 Nov 2012 ?? ?Print Version ?Bookmark and Share

Keywords:phase-change memory? vertical-NAND flash? SDRAM? LPDDR2 interface? serial-NOR 128Mbit?

Memory chip manufacturer Micron Technology Inc. has been looking at a possible 2Xnm process manufacturing node for its next generation of phase-change memory (PCM).

During the Electronica exhibition, Jeff Bader, vice president for marketing at Micron, stated that this will be the production node at roughly the same minimum geometry that the company is investigating for the introduction of vertical-NAND flash memory.

Micron has skipped a generation of PCM before. It introduced a couple of 128Mbit memories in a 90nm process in December 2008 before launching a 45nm 1Gbit PCM in July 2012. Now Micron has said it will jump the 3Xnm node.

The term 2Xnm node is the nomenclature being adopted by the memory industry to denote a manufacturing process with minimum geometries of somewhere between 20nm and 29nm. At such fine geometries old fashioned measurements of transistor gate width, line width and the half-pitch of repeated structures become hard to measure.

Bader did not indicate that a PCM introduction at 2Xnm is certain or at what level of memory capacity Micron would be aiming. Micron already produces NAND flash at 256Gbit using a 2Xnm process and moves to vertical-NAND will take capacity even higher.

However, Micron continues to pioneer the introduction of PCM, a form of non-volatile memory that makes use of change in the phase, and hence in resistance, of a thin layer of chalcogenide material. PCM claims advantages over traditional memory devices in areas such as boot time, simplified software development, performance and overwrite capability. However, the memory has been more than 40 years coming to market and detractors argue that it will never be cost competitive with other types of memory, and there are also concerns about PCM's temperature sensitivity.

Bader said that Micron will ship tens of millions of units of 1Gbit PCM in 2012 in 45nm process in its leading-edge component, which combines a 1Gbit PCM die with a 512Mbit SDRAM and provides a LPDDR2 interface. The product is targeted at high-end feature phones and low ends smartphones, which can benefit from the speed of the read in PCM and simplified software development.

Micron's volume comes from a couple of cell phone design wins. One is the Nokia Asha phone. The other has not been disclosed, said Bader.

Bader added: "We're also looking at opportunities for the 1Gbit PCM generation in other embedded applications." He said that the replacement of smaller NOR- and NAND-flash memories with same-pin-out phase-change memories showed promise, because Micron would be able to save die area and therefore cost. "Things like 128Mbit 90nm NAND, 256Mbit NAND might be lower cost production in the 45nm phase-change process," Bader said.

Bader said that the first PCM products Micron brought to market, parallel- and serial-NOR 128Mbit made using 90nm, are only selling in very low volumes. However, the memories are finding their way in to some interesting applications with potential, replacing battery-backed SRAM. "Smart metering is one potential activity," Bader said.

- Peter Clarke
??EE Times

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