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Using JESD204B for wideband data converter apps

Posted: 29 Nov 2012 ?? ?Print Version ?Bookmark and Share

Keywords:JESD204A? JESD204B? serial LVDS?

The JESD204A industry standard for serial interfaces was developed to address the problem of interconnecting the newest wideband data converters with other system ICs in an efficient and cost saving manner. The motivation was to standardise an interface that would reduce the number of digital inputs/outputs between data converters and other devicessuch as field-programmable gate arrays (FPGAs) and system-on-chip devicesthrough the use of a scaleable high-speed serial interface.

Trends show that new applications, as well as advances in existing ones, are driving the need for wideband data converters with increasingly higher sampling frequencies and data resolutions. Transmitting data to and from these wideband converters poses a significant design problem as bandwidth limitations of existing I/O technologies force the need for higher pin counts on converter products. Consequently, systems PCB designs have become increasingly more complex in terms of interconnect density. The challenge is routing a large number of high-speed digital signals while managing electrical noise. The ability to offer wideband data converters with Gsps sampling frequencies, using fewer interconnects, simplifies the PCB layout challenges and allows for smaller form factor realisation without impacting overall system performance.

Market forces continue to press for more features, functionality, and performance in a given system, driving the need for higher data-handling capacity. The high-speed A/D converter and D/A converter-to-FPGA interface had become a limiting factor in the ability of some system OEMs to meet their next-generation data-intensive demands. The JESD204B serial interface specification was specifically created to help solve this problem by addressing this critical data link. Figure 1 shows typical high-speed converter to FPGA interconnect configurations using JESD204A/B.

Figure 1: Typical high-speed converter to FPGA interconnect configurations using JESD204A/B interfacing (Source: Xilinx).

Some key end-system applications that are driving the deployment of this specification, as well as a contrast between serial LVDS and JESD204B, are the subject of the remainder of the article.

Apps driving the need for JESD204B
Wireless infrastructure transceivers: OFDM-based technologies such as LTE used in today's wireless infrastructure transceivers use DSP blocks implemented on FPGAs or system-on-chip devices driving antenna array elements to generate beams for each individual subscriber's handset. Each array element can require movement of hundreds of megabytes of data per second between FPGAs and data converters in both transmit or receive modes.

Software defined radios: Today's software defined radios utilise advanced modulation schemes that can be reconfigured on-the-fly, and rapidly increasing channel bandwidths, to deliver unprecedented wireless data rates. Efficient, low power, low pin count FPGA to data converter interfaces in the antenna path play a critical role in their performance. Software defined radio architectures are integral to the transceiver infrastructure for multi-carrier, multi-mode wireless networks supporting GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, and TD-SCDMA.

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